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endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r3 [fp #-20] ldr r3 [r3 #8] ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #4 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #4 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r3 [r3 #8] ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #4 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #4 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #4 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #4 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #4 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #4 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #4 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #4 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #4 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #4 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #4 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #4 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r3 [r3 #4] add r3 r3 #4 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #4 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | add r3 r3 #4 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #4 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #4 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #4 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #4 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #4 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #4 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r3 [r3 #8] add r3 r3 #4 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | add r3 r3 #4 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] sub r2 r2 r3 |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r3 [r3 #4] add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | add r3 r3 #8 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #4096 |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #4096 cmp r3 #0 |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #4096 cmp r3 #0 beq .L1 |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #4096 cmp r3 #0 beq .L1 ldr r3 [fp #-20] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #4096 cmp r3 #0 beq .L1 ldr r3 [fp #-20] ldr r2 [r3 #4] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r3 [r3 #8] add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #4096 cmp r3 #0 beq .L1 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | add r3 r3 #8 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #4096 cmp r3 #0 beq .L1 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] add r2 r2 r3 |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #4096 cmp r3 #0 beq .L1 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #4096 cmp r3 #0 beq .L1 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #4096 cmp r3 #0 beq .L1 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] sub sp fp #4 |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #4096 cmp r3 #0 beq .L1 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] sub sp fp #4 pop {fp pc} |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov QWORD PTR -32[rbp] rsi mov rax QWORD PTR -32[rbp] mov eax DWORD PTR [rax] sar eax 10 and eax 3 mov DWORD PTR -8[rbp] eax cmp DWORD PTR -8[rbp] 3 je .L2 | ldr r3 [fp #-20] ldr r3 [r3 #4] add r3 r3 #12 ldr r1 [fp #-16] mov r0 r3 bl p32x_sh2_read32 str r0 [fp #-8] ldr r3 [fp #-20] ldr r3 [r3 #8] add r3 r3 #12 ldr r2 [fp #-16] ldr r1 [fp #-8] mov r0 r3 bl p32x_sh2_write32 ldr r3 [fp #-20] ldr r3 [r3 #4] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L8 ldr r3 [fp #-20] ldr r3 [r3 #8] sub r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L9 ldr r3 [fp #-20] ldr r3 [r3 #8] add r2 r3 #16 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #4 ldr r3 [fp #-20] str r2 [r3 #12] b .L1 ldr r3 [fp #-20] ldr r3 [r3 #12] sub r2 r3 #1 ldr r3 [fp #-20] str r2 [r3 #12] mov r2 #1 ldr r3 [fp #-12] lsl r3 r2 r3 str r3 [fp #-12] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #32768 cmp r3 #0 beq .L11 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #16384 cmp r3 #0 beq .L12 ldr r3 [fp #-20] ldr r2 [r3 #8] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #8] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #8192 cmp r3 #0 beq .L13 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] sub r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] ldr r3 [fp #-20] ldr r3 [r3] and r3 r3 #4096 cmp r3 #0 beq .L1 ldr r3 [fp #-20] ldr r2 [r3 #4] ldr r3 [fp #-12] add r2 r2 r3 ldr r3 [fp #-20] str r2 [r3 #4] sub sp fp #4 pop {fp pc} |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov rax QWORD PTR fs:40 mov QWORD PTR -8[rbp] rax xor eax eax lea rcx -12[rbp] mov rax QWORD PTR -24[rbp] mov edx 0 mov rsi rcx mov rdi rax call cp_decl_spec@PLT | push {fp lr} add fp sp #4 sub sp sp #16 str r0 [fp #-16] ldr r3 .L4 ldr r3 [r3] str r3 [fp #-8] mov r3 #0 sub r3 fp #12 mov r2 #0 mov r1 r3 ldr r0 [fp #-16] bl cp_decl_spec ldr r3 .L4+4 ldr r3 [r3] str r3 [fp #-12] sub r3 fp #12 mov r1 r3 ldr r0 [fp #-16] bl cp_declarator sub r3 fp #12 mov r1 r3 ldr r0 [fp #-16] bl cp_decl_intern mov r3 r0 ldr r2 .L4 ldr r1 [r2] ldr r2 [fp #-8] eors r1 r2 r1 mov r2 #0 beq .L3 bl __stack_chk_fail mov r0 r3 sub sp fp #4 pop {fp pc} |
endbr64 push rbp mov rbp rsp nop pop rbp ret | str fp [sp #-4]! add fp sp #0 nop add sp fp #0 ldr fp [sp] #4 bx lr |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov rax QWORD PTR -24[rbp] mov rax QWORD PTR [rax] mov QWORD PTR -8[rbp] rax lea rdi .LC0[rip] call dprintk@PLT | push {fp lr} add fp sp #4 sub sp sp #16 str r0 [fp #-16] ldr r3 [fp #-16] ldr r3 [r3] str r3 [fp #-8] ldr r0 .L2 bl dprintk ldr r3 [fp #-8] mov r0 r3 bl i2c_del_adapter ldr r0 [fp #-8] bl kfree nop sub sp fp #4 pop {fp pc} |
endbr64 push rbp mov rbp rsp sub rsp 32 mov QWORD PTR -24[rbp] rdi mov DWORD PTR -4[rbp] 0 mov rax QWORD PTR -24[rbp] mov eax DWORD PTR 4[rax] mov edi eax call netif_running@PLT | push {fp lr} add fp sp #4 sub sp sp #16 str r0 [fp #-16] mov r3 #0 str r3 [fp #-8] ldr r3 [fp #-16] ldr r3 [r3 #4] mov r0 r3 bl netif_running mov r3 r0 cmp r3 #0 bne .L2 ldr r3 .L6 ldr r3 [r3] b .L3 ldr r3 .L6+4 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-16] bl bnx2_reset_nic ldr r3 [fp #-16] mov r0 r3 bl spin_lock_bh mov r1 #1 ldr r0 [fp #-16] bl bnx2_init_phy ldr r3 [fp #-16] mov r0 r3 bl spin_unlock_bh ldr r3 .L6+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-16] bl bnx2_run_loopback mov r3 r0 cmp r3 #0 beq .L4 ldr r3 .L6+12 ldr r3 [r3] ldr r2 [fp #-8] orr r3 r2 r3 str r3 [fp #-8] ldr r3 .L6+16 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-16] bl bnx2_run_loopback mov r3 r0 cmp r3 #0 beq .L5 ldr r3 .L6+20 ldr r3 [r3] ldr r2 [fp #-8] orr r3 r2 r3 str r3 [fp #-8] ldr r3 [fp #-8] mov r0 r3 sub sp fp #4 pop {fp pc} |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | push {fp lr} add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | add fp sp #4 sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | sub sp sp #24 str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | str r0 [fp #-24] ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | ldr r0 [fp #-24] bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | bl netdev_priv str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | str r0 [fp #-12] ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | ldr r3 .L8 ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 mov r1 r3 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | ldr r3 [r3] ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 mov r1 r3 ldr r0 [fp #-24] |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | ldr r2 .L8+4 ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 mov r1 r3 ldr r0 [fp #-24] bl bmwrite |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | ldrh r2 [r2] mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+44 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+44 ldr r3 [r3] |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+44 ldr r3 [r3] mov r1 r3 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | bl bmwrite ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+44 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | ldr r3 .L8+8 ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+44 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | ldr r1 [r3] ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+44 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+44 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+44 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+48 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+44 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+48 ldrh r3 [r3] @ movhi |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+44 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+48 ldrh r3 [r3] @ movhi lsl r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | mov r2 r3 ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+44 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+48 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | ldr r0 [fp #-24] bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+44 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+48 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldrh r3 [fp #-18] @ movhi |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | bl bmwrite mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+44 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+48 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | mov r3 #100 str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+44 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+48 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 |
endbr64 push rbp mov rbp rsp sub rsp 48 mov QWORD PTR -40[rbp] rdi mov rax QWORD PTR -40[rbp] mov rdi rax call netdev_priv@PLT | str r3 [fp #-16] ldr r3 [fp #-16] sub r3 r3 #1 str r3 [fp #-16] ldr r0 .L8+16 bl udelay ldr r3 .L8+8 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+12 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 and r3 r3 r2 lsl r3 r3 #16 lsr r3 r3 #16 cmp r3 #0 beq .L2 ldr r3 [fp #-16] cmp r3 #0 bgt .L3 ldr r3 [fp #-12] ldr r3 [r3 #4] cmp r3 #0 bne .L4 ldr r3 .L8+20 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+24 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+28 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r2 r3 #16 ldr r3 .L8+32 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 lsl r3 r3 #16 asr r3 r3 #16 orr r3 r2 r3 lsl r3 r3 #16 asr r3 r3 #16 lsl r3 r3 #16 lsr r3 r3 #16 strh r3 [fp #-18] @ movhi ldr r3 .L8+20 ldr r1 [r3] ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 mov r2 r3 ldr r0 [fp #-24] bl bmwrite ldr r0 .L8+16 bl udelay ldr r3 .L8+36 ldr r3 [r3] ldr r2 .L8+40 mov r1 r3 ldr r0 [fp #-24] bl bmwrite ldr r3 .L8+44 ldr r3 [r3] mov r1 r3 ldr r0 [fp #-24] bl bmread mov r3 r0 strh r3 [fp #-18] @ movhi ldr r3 .L8+48 ldrh r3 [r3] @ movhi lsl r3 r3 #16 lsr r2 r3 #16 ldrh r3 [fp #-18] @ movhi lsl r3 r3 #16 lsr r3 r3 #16 orr r3 r2 r3 |
Subsets and Splits