Datasets:

matthewdelorenzo

/

systemc-code-database-new

like 0

aluMux.write(0); // B = Rr2

wbMux.write(0); // use alu result

call.write(0);

break;

/*

** Transfer Imm to the Register rd

*/

case 0b0010:

aluOp.write(0b00111); // transfer B (rd = Imm)

regWrite.write(1);

r.write(0);

w.write(0);

regMux.write(0);

aluMux.write(1); // B = imm

wbMux.write(0);

call.write(0);

break;

/*

** Add Imm with register rd content and move it to the Register rd

*/

case 0b0011:

aluOp.write(0b00100); // Add A and B (rd += Imm)

regWrite.write(1);

r.write(0);

w.write(0);

regMux.write(1);

aluMux.write(1);

wbMux.write(0);

call.write(0);

break;

/*

** LOAD from Imm address of memory to rd

*/

case 0b0100:

aluOp.write(0);

regWrite.write(1);

r.write(1);

w.write(0);

regMux.write(0);

aluMux.write(0);

wbMux.write(1); // use memory result

call.write(0);

break;

/*

** STORE rd content to imm address of memory

*/

case 0b0101:

aluOp.write(0); // transfer A

regWrite.write(0); // don't write back to register

r.write(0);

w.write(1);

regMux.write(1); // r1 = reg (rd)

aluMux.write(0); // ignorable!

wbMux.write(0); // ignorable!

call.write(0);

break;

/*

** NOP

*/

case 0b1111:

aluOp.write(0);

regWrite.write(0);

r.write(0);

w.write(0);

regMux.write(0);

aluMux.write(0);

wbMux.write(0);

call.write(0);

break;

/*

** CALL Acc.

*/

default:

regWrite.write(0); // don't write back to register

r.write(0);

w.write(0);

call.write(1);

break;

}

}

};

/*

* @ASCK

*/

#include <systemc.h>

SC_MODULE (EXE) {

sc_in_clk clk;

sc_in <sc_int<8>> prev_result;

sc_in <sc_int<13>> prev_Imm;