repo_id
stringlengths 27
162
| file_path
stringlengths 42
195
| content
stringlengths 4
5.16M
| __index_level_0__
int64 0
0
|
|---|---|---|---|
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_SingleConversion_TriggerSW_IT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_SingleConversion_TriggerSW_IT\Src\system_stm32f1xx.c | /**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC->CFGR &= 0xF8FF0000U;
#else
RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull = ( pllmull >> 18U) + 2U;
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
#endif
}
#else
pllmull = pllmull >> 18U;
if (pllmull != 0x0DU)
{
pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
pllmull = 13U / 2U;
}
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
else
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
#endif /* STM32F105xC */
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
(void)(tmpreg);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD->CRL = 0x44BB44BBU;
GPIOD->CRH = 0xBBBBBBBBU;
GPIOE->CRL = 0xB44444BBU;
GPIOE->CRH = 0xBBBBBBBBU;
GPIOF->CRL = 0x44BBBBBBU;
GPIOF->CRH = 0xBBBB4444U;
GPIOG->CRL = 0x44BBBBBBU;
GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1->BTCR[4U] = 0x00001091U;
FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_SingleConversion_TriggerTimer_DMA | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_SingleConversion_TriggerTimer_DMA\Inc\main.h | /**
******************************************************************************
* @file Examples_LL/ADC/ADC_SingleConversion_TriggerTimer_DMA/Inc/main.h
* @author MCD Application Team
* @brief Header for main.c module
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_ll_bus.h"
#include "stm32f1xx_ll_rcc.h"
#include "stm32f1xx_ll_system.h"
#include "stm32f1xx_ll_utils.h"
#include "stm32f1xx_ll_cortex.h"
#include "stm32f1xx_ll_gpio.h"
#include "stm32f1xx_ll_exti.h"
#include "stm32f1xx_ll_adc.h"
#include "stm32f1xx_ll_dma.h"
#include "stm32f1xx_ll_tim.h"
#include "stm32f1xx_ll_pwr.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Define used to enable time-out management*/
#define USE_TIMEOUT 0
/**
* @brief LED2
*/
#define LED2_PIN LL_GPIO_PIN_5
#define LED2_GPIO_PORT GPIOA
#define LED2_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA)
/**
* @brief Toggle periods for various blinking modes
*/
#define LED_BLINK_FAST 200
#define LED_BLINK_SLOW 500
#define LED_BLINK_ERROR 1000
/**
* @brief Key push-button
*/
#define USER_BUTTON_PIN LL_GPIO_PIN_13
#define USER_BUTTON_GPIO_PORT GPIOC
#define USER_BUTTON_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOC)
#define USER_BUTTON_EXTI_LINE LL_EXTI_LINE_13
#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
#define USER_BUTTON_EXTI_LINE_ENABLE() LL_EXTI_EnableIT_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_EXTI_FALLING_TRIG_ENABLE() LL_EXTI_EnableFallingTrig_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_SYSCFG_SET_EXTI() do { \
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO); \
LL_GPIO_AF_SetEXTISource(LL_GPIO_AF_EXTI_PORTC, LL_GPIO_AF_EXTI_LINE13); \
} while(0)
#define USER_BUTTON_IRQHANDLER EXTI15_10_IRQHandler
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
/* IRQ Handler treatment */
void UserButton_Callback(void);
void AdcDmaTransferComplete_Callback(void);
void AdcDmaTransferHalf_Callback(void);
void AdcDmaTransferError_Callback(void);
#endif /* __MAIN_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_SingleConversion_TriggerTimer_DMA | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_SingleConversion_TriggerTimer_DMA\Inc\stm32f1xx_it.h | /**
******************************************************************************
* @file Examples_LL/ADC/ADC_SingleConversion_TriggerTimer_DMA/Inc/stm32f1xx_it.h
* @author MCD Application Team
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_IT_H
#define __STM32F1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void USER_BUTTON_IRQHANDLER(void);
void DMA1_Channel1_IRQHandler(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F1xx_IT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_SingleConversion_TriggerTimer_DMA | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_SingleConversion_TriggerTimer_DMA\Inc\stm32_assert.h | /**
******************************************************************************
* @file stm32_assert.h
* @author MCD Application Team
* @brief STM32 assert template file.
* This file should be copied to the application folder and renamed
* to stm32_assert.h.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_ASSERT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_SingleConversion_TriggerTimer_DMA | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_SingleConversion_TriggerTimer_DMA\Src\main.c | /**
******************************************************************************
* @file Examples_LL/ADC/ADC_SingleConversion_TriggerTimer_DMA/Src/main.c
* @author MCD Application Team
* @brief This example describes how to use a ADC peripheral to perform
* a single ADC conversion of a channel, at each trigger event
* from timer.
* Conversion data are transferred by DMA into a table,
* indefinitely (circular mode).
* This example is based on the STM32F1xx ADC LL API;
* Peripheral initialization done using LL unitary services functions.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup ADC_SingleConversion_TriggerTimer_DMA
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Definitions of ADC hardware constraints delays */
/* Note: Only ADC IP HW delays are defined in ADC LL driver driver, */
/* not timeout values: */
/* Timeout values for ADC operations are dependent to device clock */
/* configuration (system clock versus ADC clock), */
/* and therefore must be defined in user application. */
/* Refer to @ref ADC_LL_EC_HW_DELAYS for description of ADC timeout */
/* values definition. */
/* Timeout values for ADC operations. */
/* (enable settling time, disable settling time, ...) */
/* Values defined to be higher than worst cases: low clock frequency, */
/* maximum prescalers. */
/* Example of profile very low frequency : ADC clock frequency 12MHz */
/* prescaler 6, sampling time 1.5 ADC clock cycles, resolution 12 bits. */
/* - ADC enable time: maximum delay is 1 us */
/* (refer to device datasheet, parameter "tSTAB") */
/* - ADC disable time: maximum delay should be a few ADC clock cycles */
/* - ADC stop conversion time: maximum delay should be a few ADC clock */
/* cycles */
/* - ADC conversion time: with this hypothesis of clock settings, maximum */
/* delay will be 7us. */
/* (refer to device reference manual, section "Timing") */
/* Unit: ms */
#define ADC_CALIBRATION_TIMEOUT_MS ((uint32_t) 1)
#define ADC_ENABLE_TIMEOUT_MS ((uint32_t) 1)
#define ADC_DISABLE_TIMEOUT_MS ((uint32_t) 1)
#define ADC_STOP_CONVERSION_TIMEOUT_MS ((uint32_t) 1)
#define ADC_CONVERSION_TIMEOUT_MS ((uint32_t) 2)
/* Delay between ADC enable and ADC end of calibration. */
/* Delay estimation in CPU cycles: Case of ADC calibration done */
/* immediately after ADC enable, ADC clock setting slow */
/* (LL_ADC_CLOCK_ASYNC_DIV32). Use a higher delay if ratio */
/* (CPU clock / ADC clock) is above 32. */
#define ADC_DELAY_ENABLE_CALIB_CPU_CYCLES (LL_ADC_DELAY_ENABLE_CALIB_ADC_CYCLES * 32)
/* Definitions of environment analog values */
/* Value of analog reference voltage (Vref+), connected to analog voltage */
/* supply Vdda (unit: mV). */
#define VDDA_APPLI ((uint32_t)3300)
/* Definitions of data related to this example */
/* Definition of ADCx conversions data table size */
#define ADC_CONVERTED_DATA_BUFFER_SIZE ((uint32_t) 64)
/* Init variable out of expected ADC conversion data range */
#define VAR_CONVERTED_DATA_INIT_VALUE (__LL_ADC_DIGITAL_SCALE(LL_ADC_RESOLUTION_12B) + 1)
/* Parameters of timer (used as ADC conversion trigger) */
/* Timer frequency (unit: Hz). With a timer 16 bits and time base */
/* freq min 1Hz, range is min=1Hz, max=32kHz. */
#define TIMER_FREQUENCY ((uint32_t) 1000)
/* Timer minimum frequency (unit: Hz), used to calculate frequency range. */
/* With a timer 16 bits, maximum frequency will be 32000 times this value. */
#define TIMER_FREQUENCY_RANGE_MIN ((uint32_t) 1)
/* Timer prescaler maximum value (0xFFFF for a timer 16 bits) */
#define TIMER_PRESCALER_MAX_VALUE ((uint32_t)0xFFFF-1)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Variables for ADC conversion data */
__IO uint16_t aADCxConvertedData[ADC_CONVERTED_DATA_BUFFER_SIZE]; /* ADC group regular conversion data */
/* Variables for ADC conversion data computation to physical values */
__IO uint16_t aADCxConvertedData_Voltage_mVolt[ADC_CONVERTED_DATA_BUFFER_SIZE]; /* Value of voltage calculated from ADC conversion data (unit: mV) (array of data) */
/* Variable to report status of DMA transfer of ADC group regular conversions */
/* 0: DMA transfer is not completed */
/* 1: DMA transfer is completed */
/* 2: DMA transfer has not yet been started yet (initial state) */
__IO uint8_t ubDmaTransferStatus = 2; /* Variable set into DMA interruption callback */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void Configure_DMA(void);
void Configure_TIM_TimeBase_ADC_trigger(void);
void Configure_ADC(void);
void Activate_ADC(void);
void LED_Init(void);
void LED_On(void);
void LED_Off(void);
void LED_Blinking(uint32_t Period);
void UserButton_Init(void);
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
uint32_t tmp_index_adc_converted_data = 0;
/* Configure the system clock to 72 MHz */
SystemClock_Config();
/* Init variable containing ADC conversion data */
for (tmp_index_adc_converted_data = 0; tmp_index_adc_converted_data < ADC_CONVERTED_DATA_BUFFER_SIZE; tmp_index_adc_converted_data++)
{
aADCxConvertedData[tmp_index_adc_converted_data] = VAR_CONVERTED_DATA_INIT_VALUE;
}
/* Initialize LED2 */
LED_Init();
/* Initialize button in EXTI mode */
UserButton_Init();
/* Configure DMA for data transfer from ADC */
Configure_DMA();
/* Configure timer as a time base used to trig ADC conversion start */
Configure_TIM_TimeBase_ADC_trigger();
/* Configure ADC */
/* Note: This function configures the ADC but does not enable it. */
/* To enable it, use function "Activate_ADC()". */
/* This is intended to optimize power consumption: */
/* 1. ADC configuration can be done once at the beginning */
/* (ADC disabled, minimal power consumption) */
/* 2. ADC enable (higher power consumption) can be done just before */
/* ADC conversions needed. */
/* Then, possible to perform successive "Activate_ADC()", */
/* "Deactivate_ADC()", ..., without having to set again */
/* ADC configuration. */
Configure_ADC();
/* Activate ADC */
/* Perform ADC activation procedure to make it ready to convert. */
Activate_ADC();
/* Infinite loop */
while (1)
{
/* Note: ADC group regular conversion start is done into push button */
/* IRQ handler, refer to function "UserButton_Callback()". */
/* Then, ADC conversions are performed indefinitely (trigger from */
/* timer: ADC conversions as long as timer is running). */
/* Note: LED state depending on DMA transfer status is set into DMA */
/* IRQ handler, */
/* refer to functions "AdcDmaTransferComplete_Callback()" */
/* and "AdcDmaTransferHalf_Callback()". */
/* Note: ADC conversions data are stored into array */
/* "aADCxConvertedData" */
/* (for debug: see variable content into watch window). */
/* Note: ADC conversion data are computed to physical values */
/* into array "aADCxConvertedData_Voltage_mVolt" */
/* using ADC LL driver helper macro "__LL_ADC_CALC_DATA_TO_VOLTAGE()". */
/* (for debug: see variable content into watch window). */
}
}
/**
* @brief This function configures DMA for transfer of data from ADC
* @param None
* @retval None
*/
void Configure_DMA(void)
{
/*## Configuration of NVIC #################################################*/
/* Configure NVIC to enable DMA interruptions */
NVIC_SetPriority(DMA1_Channel1_IRQn, 1); /* DMA IRQ lower priority than ADC IRQ */
NVIC_EnableIRQ(DMA1_Channel1_IRQn);
/*## Configuration of DMA ##################################################*/
/* Enable the peripheral clock of DMA */
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1);
/* Configure the DMA transfer */
/* - DMA transfer in circular mode to match with ADC configuration: */
/* DMA unlimited requests. */
/* - DMA transfer from ADC without address increment. */
/* - DMA transfer to memory with address increment. */
/* - DMA transfer from ADC by half-word to match with ADC configuration: */
/* ADC resolution 12 bits. */
/* - DMA transfer to memory by half-word to match with ADC conversion data */
/* buffer variable type: half-word. */
LL_DMA_ConfigTransfer(DMA1,
LL_DMA_CHANNEL_1,
LL_DMA_DIRECTION_PERIPH_TO_MEMORY |
LL_DMA_MODE_CIRCULAR |
LL_DMA_PERIPH_NOINCREMENT |
LL_DMA_MEMORY_INCREMENT |
LL_DMA_PDATAALIGN_HALFWORD |
LL_DMA_MDATAALIGN_HALFWORD |
LL_DMA_PRIORITY_HIGH );
/* Set DMA transfer addresses of source and destination */
LL_DMA_ConfigAddresses(DMA1,
LL_DMA_CHANNEL_1,
LL_ADC_DMA_GetRegAddr(ADC1, LL_ADC_DMA_REG_REGULAR_DATA),
(uint32_t)&aADCxConvertedData,
LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
/* Set DMA transfer size */
LL_DMA_SetDataLength(DMA1,
LL_DMA_CHANNEL_1,
ADC_CONVERTED_DATA_BUFFER_SIZE);
/* Enable DMA transfer interruption: transfer complete */
LL_DMA_EnableIT_TC(DMA1,
LL_DMA_CHANNEL_1);
/* Enable DMA transfer interruption: half transfer */
LL_DMA_EnableIT_HT(DMA1,
LL_DMA_CHANNEL_1);
/* Enable DMA transfer interruption: transfer error */
LL_DMA_EnableIT_TE(DMA1,
LL_DMA_CHANNEL_1);
/*## Activation of DMA #####################################################*/
/* Enable the DMA transfer */
LL_DMA_EnableChannel(DMA1,
LL_DMA_CHANNEL_1);
}
/**
* @brief Configure timer as a time base (timer instance: TIM3)
* used to trig ADC conversion start.
* @note In this ADC example, timer instance must be on APB1 (clocked by PCLK1)
* to be compliant with frequency calculation used in this function.
* @param None
* @retval None
*/
void Configure_TIM_TimeBase_ADC_trigger(void)
{
uint32_t timer_clock_frequency = 0; /* Timer clock frequency */
uint32_t timer_prescaler = 0; /* Time base prescaler to have timebase aligned on minimum frequency possible */
uint32_t timer_reload = 0; /* Timer reload value in function of timer prescaler to achieve time base period */
/*## Configuration of NVIC #################################################*/
/* Note: In this example, timer interrupts are not activated. */
/* If needed, timer interruption at each time base period is */
/* possible. */
/* Refer to timer examples. */
/* Configuration of timer as time base: */
/* Caution: Computation of frequency is done for a timer instance on APB1 */
/* (clocked by PCLK1) */
/* Timer frequency is configured from the following constants: */
/* - TIMER_FREQUENCY: timer frequency (unit: Hz). */
/* - TIMER_FREQUENCY_RANGE_MIN: timer minimum frequency possible */
/* (unit: Hz). */
/* Note: Refer to comments at these literals definition for more details. */
/* Retrieve timer clock source frequency */
/* If APB1 prescaler is different of 1, timers have a factor x2 on their */
/* clock source. */
if (LL_RCC_GetAPB1Prescaler() == LL_RCC_APB1_DIV_1)
{
timer_clock_frequency = __LL_RCC_CALC_PCLK1_FREQ(SystemCoreClock, LL_RCC_GetAPB1Prescaler());
}
else
{
timer_clock_frequency = (__LL_RCC_CALC_PCLK1_FREQ(SystemCoreClock, LL_RCC_GetAPB1Prescaler()) * 2);
}
/* Timer prescaler calculation */
/* (computation for timer 16 bits, additional + 1 to round the prescaler up) */
timer_prescaler = ((timer_clock_frequency / (TIMER_PRESCALER_MAX_VALUE * TIMER_FREQUENCY_RANGE_MIN)) +1);
/* Timer reload calculation */
timer_reload = (timer_clock_frequency / (timer_prescaler * TIMER_FREQUENCY));
/* Enable the timer peripheral clock */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_TIM3);
/* Set timer pre-scaler value */
LL_TIM_SetPrescaler(TIM3, (timer_prescaler - 1));
/* Set timer auto-reload value */
LL_TIM_SetAutoReload(TIM3, (timer_reload - 1));
/* Counter mode: select up-counting mode */
LL_TIM_SetCounterMode(TIM3, LL_TIM_COUNTERMODE_UP);
/* Set the repetition counter */
LL_TIM_SetRepetitionCounter(TIM3, 0);
/* Note: In this example, timer interrupts are not activated. */
/* If needed, timer interruption at each time base period is */
/* possible. */
/* Refer to timer examples. */
/* Set timer the trigger output (TRGO) */
LL_TIM_SetTriggerOutput(TIM3, LL_TIM_TRGO_UPDATE);
/* Enable counter */
LL_TIM_EnableCounter(TIM3);
}
/**
* @brief Configure ADC (ADC instance: ADC1) and GPIO used by ADC channels.
* @note In case re-use of this function outside of this example:
* This function includes checks of ADC hardware constraints before
* executing some configuration functions.
* - In this example, all these checks are not necessary but are
* implemented anyway to show the best practice usages
* corresponding to reference manual procedure.
* (On some STM32 series, setting of ADC features are not
* conditioned to ADC state. However, in order to be compliant with
* other STM32 series and to show the best practice usages,
* ADC state is checked anyway with same constraints).
* Software can be optimized by removing some of these checks,
* if they are not relevant considering previous settings and actions
* in user application.
* - If ADC is not in the appropriate state to modify some parameters,
* the setting of these parameters is bypassed without error
* reporting:
* it can be the expected behavior in case of recall of this
* function to update only a few parameters (which update fulfills
* the ADC state).
* Otherwise, it is up to the user to set the appropriate error
* reporting in user application.
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_ADC(void)
{
/*## Configuration of GPIO used by ADC channels ############################*/
/* Note: On this STM32 device, ADC1 channel 4 is mapped on GPIO pin PA.04 */
/* Enable GPIO Clock */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA);
/* Configure GPIO in analog mode to be used as ADC input */
LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_4, LL_GPIO_MODE_ANALOG);
/*## Configuration of NVIC #################################################*/
/* Configure NVIC to enable ADC1 interruptions */
NVIC_SetPriority(ADC1_IRQn, 0); /* ADC IRQ greater priority than DMA IRQ */
NVIC_EnableIRQ(ADC1_IRQn);
/*## Configuration of ADC ##################################################*/
/*## Configuration of ADC hierarchical scope: common to several ADC ########*/
/* Enable ADC clock (core clock) */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_ADC1);
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, in order to be compliant with other STM32 series */
/* and to show the best practice usages, ADC state is checked. */
/* Software can be optimized by removing some of these checks, if */
/* they are not relevant considering previous settings and actions */
/* in user application. */
if(__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE() == 0)
{
/* Note: Call of the functions below are commented because they are */
/* useless in this example: */
/* setting corresponding to default configuration from reset state. */
/* Set ADC measurement path to internal channels */
// LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_PATH_INTERNAL_NONE);
/*## Configuration of ADC hierarchical scope: multimode ####################*/
/* Set ADC multimode configuration */
// LL_ADC_SetMultimode(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_MULTI_INDEPENDENT);
/* Set ADC multimode DMA transfer */
// LL_ADC_SetMultiDMATransfer(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_MULTI_REG_DMA_EACH_ADC);
/* Set ADC multimode: delay between 2 sampling phases */
// LL_ADC_SetMultiTwoSamplingDelay(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE);
}
/*## Configuration of ADC hierarchical scope: ADC instance #################*/
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, ADC state is checked anyway with standard requirements */
/* (refer to description of this function). */
if (LL_ADC_IsEnabled(ADC1) == 0)
{
/* Note: Call of the functions below are commented because they are */
/* useless in this example: */
/* setting corresponding to default configuration from reset state. */
/* Set ADC conversion data alignment */
// LL_ADC_SetResolution(ADC1, LL_ADC_DATA_ALIGN_RIGHT);
/* Set Set ADC sequencers scan mode, for all ADC groups */
/* (group regular, group injected). */
// LL_ADC_SetSequencersScanMode(ADC1, LL_ADC_SEQ_SCAN_DISABLE);
}
/*## Configuration of ADC hierarchical scope: ADC group regular ############*/
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, ADC state is checked anyway with standard requirements */
/* (refer to description of this function). */
if (LL_ADC_IsEnabled(ADC1) == 0)
{
/* Set ADC group regular trigger source */
LL_ADC_REG_SetTriggerSource(ADC1, LL_ADC_REG_TRIG_EXT_TIM3_TRGO);
/* Set ADC group regular trigger polarity */
// LL_ADC_REG_SetTriggerEdge(ADC1, LL_ADC_REG_TRIG_EXT_RISING);
/* Set ADC group regular continuous mode */
LL_ADC_REG_SetContinuousMode(ADC1, LL_ADC_REG_CONV_SINGLE);
/* Set ADC group regular conversion data transfer */
LL_ADC_REG_SetDMATransfer(ADC1, LL_ADC_REG_DMA_TRANSFER_UNLIMITED);
/* Set ADC group regular sequencer */
/* Note: On this STM32 series, ADC group regular sequencer is */
/* fully configurable: sequencer length and each rank */
/* affectation to a channel are configurable. */
/* Refer to description of function */
/* "LL_ADC_REG_SetSequencerLength()". */
/* Set ADC group regular sequencer length and scan direction */
LL_ADC_REG_SetSequencerLength(ADC1, LL_ADC_REG_SEQ_SCAN_DISABLE);
/* Set ADC group regular sequencer discontinuous mode */
// LL_ADC_REG_SetSequencerDiscont(ADC1, LL_ADC_REG_SEQ_DISCONT_DISABLE);
/* Set ADC group regular sequence: channel on the selected sequence rank. */
LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_1, LL_ADC_CHANNEL_4);
}
/*## Configuration of ADC hierarchical scope: ADC group injected ###########*/
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, ADC state is checked anyway with standard requirements */
/* (refer to description of this function). */
if (LL_ADC_IsEnabled(ADC1) == 0)
{
/* Note: Call of the functions below are commented because they are */
/* useless in this example: */
/* setting corresponding to default configuration from reset state. */
/* Set ADC group injected trigger source */
// LL_ADC_INJ_SetTriggerSource(ADC1, LL_ADC_INJ_TRIG_SOFTWARE);
/* Set ADC group injected trigger polarity */
// LL_ADC_INJ_SetTriggerEdge(ADC1, LL_ADC_INJ_TRIG_EXT_RISING);
/* Set ADC group injected conversion trigger */
// LL_ADC_INJ_SetTrigAuto(ADC1, LL_ADC_INJ_TRIG_INDEPENDENT);
/* Set ADC group injected sequencer */
/* Note: On this STM32 series, ADC group injected sequencer is */
/* fully configurable: sequencer length and each rank */
/* affectation to a channel are configurable. */
/* Refer to description of function */
/* "LL_ADC_INJ_SetSequencerLength()". */
/* Set ADC group injected sequencer length and scan direction */
// LL_ADC_INJ_SetSequencerLength(ADC1, LL_ADC_INJ_SEQ_SCAN_DISABLE);
/* Set ADC group injected sequencer discontinuous mode */
// LL_ADC_INJ_SetSequencerDiscont(ADC1, LL_ADC_INJ_SEQ_DISCONT_DISABLE);
/* Set ADC group injected sequence: channel on the selected sequence rank. */
// LL_ADC_INJ_SetSequencerRanks(ADC1, LL_ADC_INJ_RANK_1, LL_ADC_CHANNEL_4);
}
/*## Configuration of ADC hierarchical scope: channels #####################*/
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, in order to be compliant with other STM32 series */
/* and to show the best practice usages, ADC state is checked. */
/* Software can be optimized by removing some of these checks, if */
/* they are not relevant considering previous settings and actions */
/* in user application. */
if (LL_ADC_IsEnabled(ADC1) == 0)
{
/* Set ADC channels sampling time */
/* Note: Considering interruption occurring after each number of */
/* "ADC_CONVERTED_DATA_BUFFER_SIZE" ADC conversions */
/* (IT from DMA transfer complete), */
/* select sampling time and ADC clock with sufficient */
/* duration to not create an overhead situation in IRQHandler. */
LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_4, LL_ADC_SAMPLINGTIME_41CYCLES_5);
}
/*## Configuration of ADC transversal scope: analog watchdog ###############*/
/* Note: On this STM32 series, there is only 1 analog watchdog available. */
/* Set ADC analog watchdog: channels to be monitored */
// LL_ADC_SetAnalogWDMonitChannels(ADC1, LL_ADC_AWD_DISABLE);
/* Set ADC analog watchdog: thresholds */
// LL_ADC_SetAnalogWDThresholds(ADC1, LL_ADC_AWD_THRESHOLD_HIGH, __LL_ADC_DIGITAL_SCALE(LL_ADC_RESOLUTION_12B));
// LL_ADC_SetAnalogWDThresholds(ADC1, LL_ADC_AWD_THRESHOLD_LOW, 0x000);
/*## Configuration of ADC transversal scope: oversampling ##################*/
/* Note: Feature not available on this STM32 series */
/*## Configuration of ADC interruptions ####################################*/
/* Note: In this example, no ADC interruption enabled */
/* Note: in this example, ADC group regular end of conversions */
/* (number of ADC conversions defined by DMA buffer size) */
/* are notified by DMA transfer interruptions). */
}
/**
* @brief Perform ADC activation procedure to make it ready to convert
* (ADC instance: ADC1).
* @note Operations:
* - ADC instance
* - Run ADC self calibration
* - Enable ADC
* - ADC group regular
* none: ADC conversion start-stop to be performed
* after this function
* - ADC group injected
* none: ADC conversion start-stop to be performed
* after this function
* @param None
* @retval None
*/
void Activate_ADC(void)
{
__IO uint32_t wait_loop_index = 0;
#if (USE_TIMEOUT == 1)
uint32_t Timeout = 0; /* Variable used for timeout management */
#endif /* USE_TIMEOUT */
/*## Operation on ADC hierarchical scope: ADC instance #####################*/
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, in order to be compliant with other STM32 series */
/* and to show the best practice usages, ADC state is checked. */
/* Software can be optimized by removing some of these checks, if */
/* they are not relevant considering previous settings and actions */
/* in user application. */
if (LL_ADC_IsEnabled(ADC1) == 0)
{
/* Enable ADC */
LL_ADC_Enable(ADC1);
/* Delay between ADC enable and ADC start of calibration. */
/* Note: Variable divided by 2 to compensate partially */
/* CPU processing cycles (depends on compilation optimization). */
wait_loop_index = (ADC_DELAY_ENABLE_CALIB_CPU_CYCLES >> 1);
while(wait_loop_index != 0)
{
wait_loop_index--;
}
/* Run ADC self calibration */
LL_ADC_StartCalibration(ADC1);
/* Poll for ADC effectively calibrated */
#if (USE_TIMEOUT == 1)
Timeout = ADC_CALIBRATION_TIMEOUT_MS;
#endif /* USE_TIMEOUT */
while (LL_ADC_IsCalibrationOnGoing(ADC1) != 0)
{
#if (USE_TIMEOUT == 1)
/* Check Systick counter flag to decrement the time-out value */
if (LL_SYSTICK_IsActiveCounterFlag())
{
if(Timeout-- == 0)
{
/* Time-out occurred. Set LED to blinking mode */
LED_Blinking(LED_BLINK_ERROR);
}
}
#endif /* USE_TIMEOUT */
}
}
/*## Operation on ADC hierarchical scope: ADC group regular ################*/
/* Note: No operation on ADC group regular performed here. */
/* ADC group regular conversions to be performed after this function */
/* using function: */
/* "LL_ADC_REG_StartConversion();" */
/*## Operation on ADC hierarchical scope: ADC group injected ###############*/
/* Note: No operation on ADC group injected performed here. */
/* ADC group injected conversions to be performed after this function */
/* using function: */
/* "LL_ADC_INJ_StartConversion();" */
}
/**
* @brief Initialize LED2.
* @param None
* @retval None
*/
void LED_Init(void)
{
/* Enable the LED2 Clock */
LED2_GPIO_CLK_ENABLE();
/* Configure IO in output push-pull mode to drive external LED2 */
LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
/* Reset value is LL_GPIO_OUTPUT_PUSHPULL */
//LL_GPIO_SetPinOutputType(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_OUTPUT_PUSHPULL);
/* Reset value is LL_GPIO_SPEED_FREQ_LOW */
//LL_GPIO_SetPinSpeed(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_SPEED_FREQ_LOW);
/* Reset value is LL_GPIO_PULL_DOWN */
//LL_GPIO_SetPinPull(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_PULL_DOWN);
}
/**
* @brief Turn-on LED2.
* @param None
* @retval None
*/
void LED_On(void)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Turn-off LED2.
* @param None
* @retval None
*/
void LED_Off(void)
{
/* Turn LED2 off */
LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Set LED2 to Blinking mode for an infinite loop (toggle period based on value provided as input parameter).
* @param Period : Period of time (in ms) between each toggling of LED
* This parameter can be user defined values. Pre-defined values used in that example are :
* @arg LED_BLINK_FAST : Fast Blinking
* @arg LED_BLINK_SLOW : Slow Blinking
* @arg LED_BLINK_ERROR : Error specific Blinking
* @retval None
*/
void LED_Blinking(uint32_t Period)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
/* Toggle IO in an infinite loop */
while (1)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(Period);
}
}
/**
* @brief Configures User push-button in EXTI Line Mode.
* @param None
* @retval None
*/
void UserButton_Init(void)
{
/* Enable the BUTTON Clock */
USER_BUTTON_GPIO_CLK_ENABLE();
/* Configure GPIO for BUTTON */
LL_GPIO_SetPinMode(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_MODE_INPUT);
LL_GPIO_SetPinPull(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_PULL_DOWN);
/* if(Button_Mode == BUTTON_MODE_EXTI) */
{
/* Connect External Line to the GPIO */
USER_BUTTON_SYSCFG_SET_EXTI();
/* Enable a rising trigger EXTI line 13 Interrupt */
USER_BUTTON_EXTI_LINE_ENABLE();
USER_BUTTON_EXTI_FALLING_TRIG_ENABLE();
/* Configure NVIC for USER_BUTTON_EXTI_IRQn */
NVIC_EnableIRQ(USER_BUTTON_EXTI_IRQn);
NVIC_SetPriority(USER_BUTTON_EXTI_IRQn,0x03);
}
}
/**
* @brief System Clock Configuration
* The system Clock is configured as follow :
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 72000000
* HCLK(Hz) = 72000000
* AHB Prescaler = 1
* APB1 Prescaler = 2
* APB2 Prescaler = 1
* HSE Frequency(Hz) = 8000000
* PLLMUL = 9
* Flash Latency(WS) = 2
* @param None
* @retval None
*/
void SystemClock_Config(void)
{
/* Set FLASH latency */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
/* Enable HSE oscillator */
LL_RCC_HSE_EnableBypass();
LL_RCC_HSE_Enable();
while(LL_RCC_HSE_IsReady() != 1)
{
};
/* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
LL_RCC_PLL_Enable();
while(LL_RCC_PLL_IsReady() != 1)
{
};
/* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
};
/* Set APB1 & APB2 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
/* Set systick to 1ms in using frequency set to 72MHz */
LL_Init1msTick(72000000);
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(72000000);
}
/******************************************************************************/
/* USER IRQ HANDLER TREATMENT */
/******************************************************************************/
/**
* @brief Function to manage IRQ Handler
* @param None
* @retval None
*/
void UserButton_Callback(void)
{
/* Start ADC conversion only on the first press on push button */
if (ubDmaTransferStatus == 2)
{
/* Update status variable of DMA transfer */
ubDmaTransferStatus = 0;
/* Start ADC group regular conversion */
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, in order to be compliant with other STM32 series */
/* and to show the best practice usages, ADC state is checked. */
/* Software can be optimized by removing some of these checks, if */
/* they are not relevant considering previous settings and actions */
/* in user application. */
if (LL_ADC_IsEnabled(ADC1) == 1)
{
LL_ADC_REG_StartConversionExtTrig(ADC1, LL_ADC_REG_TRIG_EXT_RISING);
}
else
{
/* Error: ADC conversion start could not be performed */
LED_Blinking(LED_BLINK_ERROR);
}
}
}
/**
* @brief DMA transfer complete callback
* @note This function is executed when the transfer complete interrupt
* is generated
* @retval None
*/
void AdcDmaTransferComplete_Callback()
{
uint32_t tmp_index = 0;
/* Computation of ADC conversions raw data to physical values */
/* using LL ADC driver helper macro. */
/* Management of the 2nd half of the buffer */
for (tmp_index = (ADC_CONVERTED_DATA_BUFFER_SIZE/2); tmp_index < ADC_CONVERTED_DATA_BUFFER_SIZE; tmp_index++)
{
aADCxConvertedData_Voltage_mVolt[tmp_index] = __LL_ADC_CALC_DATA_TO_VOLTAGE(VDDA_APPLI, aADCxConvertedData[tmp_index], LL_ADC_RESOLUTION_12B);
}
/* Update status variable of DMA transfer */
ubDmaTransferStatus = 1;
/* Set LED depending on DMA transfer status */
/* - Turn-on if DMA transfer is completed */
/* - Turn-off if DMA transfer is not completed */
LED_On();
}
/**
* @brief DMA half transfer callback
* @note This function is executed when the half transfer interrupt
* is generated
* @retval None
*/
void AdcDmaTransferHalf_Callback()
{
uint32_t tmp_index = 0;
/* Computation of ADC conversions raw data to physical values */
/* using LL ADC driver helper macro. */
/* Management of the 1st half of the buffer */
for (tmp_index = 0; tmp_index < (ADC_CONVERTED_DATA_BUFFER_SIZE/2); tmp_index++)
{
aADCxConvertedData_Voltage_mVolt[tmp_index] = __LL_ADC_CALC_DATA_TO_VOLTAGE(VDDA_APPLI, aADCxConvertedData[tmp_index], LL_ADC_RESOLUTION_12B);
}
/* Update status variable of DMA transfer */
ubDmaTransferStatus = 0;
/* Set LED depending on DMA transfer status */
/* - Turn-on if DMA transfer is completed */
/* - Turn-off if DMA transfer is not completed */
LED_Off();
}
/**
* @brief DMA transfer error callback
* @note This function is executed when the transfer error interrupt
* is generated during DMA transfer
* @retval None
*/
void AdcDmaTransferError_Callback()
{
/* Error detected during DMA transfer */
LED_Blinking(LED_BLINK_ERROR);
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_SingleConversion_TriggerTimer_DMA | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_SingleConversion_TriggerTimer_DMA\Src\stm32f1xx_it.c | /**
******************************************************************************
* @file Examples_LL/ADC/ADC_SingleConversion_TriggerTimer_DMA/Src/stm32f1xx_it.c
* @author MCD Application Team
* @brief Main Interrupt Service Routines.
* This file provides template for all exceptions handler and
* peripherals interrupt service routine.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_it.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup ADC_SingleConversion_TriggerTimer_DMA
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
/**
* @brief This function handles PendSVC exception.
* @param None
* @retval None
*/
void PendSV_Handler(void)
{
}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
void SysTick_Handler(void)
{
}
/******************************************************************************/
/* STM32F1xx Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @brief This function handles external lines 10 to 15 interrupt request.
* @param None
* @retval None
*/
void USER_BUTTON_IRQHANDLER(void)
{
/* Manage Flags */
if(LL_EXTI_IsActiveFlag_0_31(USER_BUTTON_EXTI_LINE) != RESET)
{
/* Call interruption treatment function */
UserButton_Callback();
/* Clear EXTI line flag */
/* Note: Clear flag after callback function to minimize user button */
/* switch debounce parasitics. */
LL_EXTI_ClearFlag_0_31(USER_BUTTON_EXTI_LINE);
}
}
/**
* @brief This function handles DMA1 interrupt request.
* @param None
* @retval None
*/
void DMA1_Channel1_IRQHandler(void)
{
/* Check whether DMA transfer complete caused the DMA interruption */
if(LL_DMA_IsActiveFlag_TC1(DMA1) == 1)
{
/* Clear flag DMA transfer complete */
LL_DMA_ClearFlag_TC1(DMA1);
/* Call interruption treatment function */
AdcDmaTransferComplete_Callback();
}
/* Check whether DMA half transfer caused the DMA interruption */
if(LL_DMA_IsActiveFlag_HT1(DMA1) == 1)
{
/* Clear flag DMA half transfer */
LL_DMA_ClearFlag_HT1(DMA1);
/* Call interruption treatment function */
AdcDmaTransferHalf_Callback();
}
/* Check whether DMA transfer error caused the DMA interruption */
if(LL_DMA_IsActiveFlag_TE1(DMA1) == 1)
{
/* Clear flag DMA transfer error */
LL_DMA_ClearFlag_TE1(DMA1);
/* Call interruption treatment function */
AdcDmaTransferError_Callback();
}
}
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_SingleConversion_TriggerTimer_DMA | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_SingleConversion_TriggerTimer_DMA\Src\system_stm32f1xx.c | /**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC->CFGR &= 0xF8FF0000U;
#else
RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull = ( pllmull >> 18U) + 2U;
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
#endif
}
#else
pllmull = pllmull >> 18U;
if (pllmull != 0x0DU)
{
pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
pllmull = 13U / 2U;
}
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
else
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
#endif /* STM32F105xC */
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
(void)(tmpreg);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD->CRL = 0x44BB44BBU;
GPIOD->CRH = 0xBBBBBBBBU;
GPIOE->CRL = 0xB44444BBU;
GPIOE->CRH = 0xBBBBBBBBU;
GPIOF->CRL = 0x44BBBBBBU;
GPIOF->CRH = 0xBBBB4444U;
GPIOG->CRL = 0x44BBBBBBU;
GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1->BTCR[4U] = 0x00001091U;
FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_TemperatureSensor | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_TemperatureSensor\Inc\main.h | /**
******************************************************************************
* @file Examples_LL/ADC/ADC_TemperatureSensor/Inc/main.h
* @author MCD Application Team
* @brief Header for main.c module
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_ll_bus.h"
#include "stm32f1xx_ll_rcc.h"
#include "stm32f1xx_ll_system.h"
#include "stm32f1xx_ll_utils.h"
#include "stm32f1xx_ll_cortex.h"
#include "stm32f1xx_ll_gpio.h"
#include "stm32f1xx_ll_exti.h"
#include "stm32f1xx_ll_adc.h"
#include "stm32f1xx_ll_pwr.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Define used to enable time-out management*/
#define USE_TIMEOUT 0
/**
* @brief LED2
*/
#define LED2_PIN LL_GPIO_PIN_5
#define LED2_GPIO_PORT GPIOA
#define LED2_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA)
/**
* @brief Toggle periods for various blinking modes
*/
#define LED_BLINK_FAST 200
#define LED_BLINK_SLOW 500
#define LED_BLINK_ERROR 1000
/**
* @brief Key push-button
*/
#define USER_BUTTON_PIN LL_GPIO_PIN_13
#define USER_BUTTON_GPIO_PORT GPIOC
#define USER_BUTTON_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOC)
#define USER_BUTTON_EXTI_LINE LL_EXTI_LINE_13
#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
#define USER_BUTTON_EXTI_LINE_ENABLE() LL_EXTI_EnableIT_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_EXTI_FALLING_TRIG_ENABLE() LL_EXTI_EnableFallingTrig_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_SYSCFG_SET_EXTI() do { \
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO); \
LL_GPIO_AF_SetEXTISource(LL_GPIO_AF_EXTI_PORTC, LL_GPIO_AF_EXTI_LINE13); \
} while(0)
#define USER_BUTTON_IRQHANDLER EXTI15_10_IRQHandler
#define INTERNAL_TEMPSENSOR_AVGSLOPE ((int32_t) 4300) /* Internal temperature sensor, parameter Avg_Slope (unit: uV/DegCelsius). Refer to device datasheet for min/typ/max values. */
#define INTERNAL_TEMPSENSOR_V25 ((int32_t) 1430) /* Internal temperature sensor, parameter V25 (unit: mV). Refer to device datasheet for min/typ/max values. */
#define INTERNAL_TEMPSENSOR_V25_TEMP ((int32_t) 25)
#define INTERNAL_TEMPSENSOR_V25_VREF ((int32_t) 3300)
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
/* IRQ Handler treatment */
void UserButton_Callback(void);
#endif /* __MAIN_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_TemperatureSensor | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_TemperatureSensor\Inc\stm32f1xx_it.h | /**
******************************************************************************
* @file Examples_LL/ADC/ADC_TemperatureSensor/Inc/stm32f1xx_it.h
* @author MCD Application Team
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_IT_H
#define __STM32F1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void USER_BUTTON_IRQHANDLER(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F1xx_IT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_TemperatureSensor | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_TemperatureSensor\Inc\stm32_assert.h | /**
******************************************************************************
* @file stm32_assert.h
* @author MCD Application Team
* @brief STM32 assert template file.
* This file should be copied to the application folder and renamed
* to stm32_assert.h.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_ASSERT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_TemperatureSensor | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_TemperatureSensor\Src\main.c | /**
******************************************************************************
* @file Examples_LL/ADC/ADC_TemperatureSensor/Src/main.c
* @author MCD Application Team
* @brief This example describes how to use a ADC peripheral to perform
* a single ADC conversion of the internal temperature sensor
* and to calculate the temperature in degree Celsius;
* Example using programming model: polling
* (for programming models interrupt or DMA transfer, refer to
* other examples).
* This example is based on the STM32F1xx ADC LL API;
* Peripheral initialization done using LL unitary services functions.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup ADC_TemperatureSensor
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Definitions of ADC hardware constraints delays */
/* Note: Only ADC IP HW delays are defined in ADC LL driver driver, */
/* not timeout values: */
/* Timeout values for ADC operations are dependent to device clock */
/* configuration (system clock versus ADC clock), */
/* and therefore must be defined in user application. */
/* Refer to @ref ADC_LL_EC_HW_DELAYS for description of ADC timeout */
/* values definition. */
/* Timeout values for ADC operations. */
/* (enable settling time, disable settling time, ...) */
/* Values defined to be higher than worst cases: low clock frequency, */
/* maximum prescalers. */
/* Example of profile very low frequency : ADC clock frequency 12MHz */
/* prescaler 6, sampling time 1.5 ADC clock cycles, resolution 12 bits. */
/* - ADC enable time: maximum delay is 1 us */
/* (refer to device datasheet, parameter "tSTAB") */
/* - ADC disable time: maximum delay should be a few ADC clock cycles */
/* - ADC stop conversion time: maximum delay should be a few ADC clock */
/* cycles */
/* - ADC conversion time: with this hypothesis of clock settings, maximum */
/* delay will be 7us. */
/* (refer to device reference manual, section "Timing") */
/* Unit: ms */
#define ADC_CALIBRATION_TIMEOUT_MS ((uint32_t) 1)
#define ADC_ENABLE_TIMEOUT_MS ((uint32_t) 1)
#define ADC_DISABLE_TIMEOUT_MS ((uint32_t) 1)
#define ADC_STOP_CONVERSION_TIMEOUT_MS ((uint32_t) 1)
#define ADC_CONVERSION_TIMEOUT_MS ((uint32_t) 2)
/* Delay between ADC enable and ADC end of calibration. */
/* Delay estimation in CPU cycles: Case of ADC calibration done */
/* immediately after ADC enable, ADC clock setting slow */
/* (LL_ADC_CLOCK_ASYNC_DIV32). Use a higher delay if ratio */
/* (CPU clock / ADC clock) is above 32. */
#define ADC_DELAY_ENABLE_CALIB_CPU_CYCLES (LL_ADC_DELAY_ENABLE_CALIB_ADC_CYCLES * 32)
/* Definitions of environment analog values */
/* Value of analog reference voltage (Vref+), connected to analog voltage */
/* supply Vdda (unit: mV). */
#define VDDA_APPLI ((uint32_t)3300)
/* Definitions of data related to this example */
/* ADC unitary conversion timeout */
/* Considering ADC settings, duration of 1 ADC conversion should always */
/* be lower than 1ms. */
#define ADC_UNITARY_CONVERSION_TIMEOUT_MS ((uint32_t) 1)
/* Init variable out of expected ADC conversion data range */
#define VAR_CONVERTED_DATA_INIT_VALUE (__LL_ADC_DIGITAL_SCALE(LL_ADC_RESOLUTION_12B) + 1)
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
__IO uint32_t ubUserButtonPressed = 0;
/* Variables for ADC conversion data */
__IO uint16_t uhADCxConvertedData = VAR_CONVERTED_DATA_INIT_VALUE; /* ADC group regular conversion data */
/* Variables for ADC conversion data computation to physical values */
__IO uint16_t hADCxConvertedData_Temperature_DegreeCelsius = 0; /* Value of temperature calculated from ADC conversion data (unit: degree Celsius) */
/* Variable to report status of ADC group regular unitary conversion */
/* 0: ADC group regular unitary conversion is not completed */
/* 1: ADC group regular unitary conversion is completed */
/* 2: ADC group regular unitary conversion has not been started yet */
/* (initial state) */
__IO uint8_t ubAdcGrpRegularUnitaryConvStatus = 2; /* Variable set into ADC interruption callback */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void Configure_ADC(void);
void Activate_ADC(void);
void ConversionStartPoll_ADC_GrpRegular(void);
void LED_Init(void);
void LED_On(void);
void LED_Off(void);
void LED_Blinking(uint32_t Period);
void UserButton_Init(void);
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/* Configure the system clock to 72 MHz */
SystemClock_Config();
/* Initialize LED2 */
LED_Init();
/* Initialize button in EXTI mode */
UserButton_Init();
/* Configure ADC */
/* Note: This function configures the ADC but does not enable it. */
/* To enable it, use function "Activate_ADC()". */
/* This is intended to optimize power consumption: */
/* 1. ADC configuration can be done once at the beginning */
/* (ADC disabled, minimal power consumption) */
/* 2. ADC enable (higher power consumption) can be done just before */
/* ADC conversions needed. */
/* Then, possible to perform successive "Activate_ADC()", */
/* "Deactivate_ADC()", ..., without having to set again */
/* ADC configuration. */
Configure_ADC();
/* Activate ADC */
/* Perform ADC activation procedure to make it ready to convert. */
Activate_ADC();
/* Infinite loop */
while (1)
{
/* Wait for user press on push button */
while (ubUserButtonPressed != 1)
{
}
ubUserButtonPressed = 0;
/* Turn LED off before performing a new ADC conversion start */
LED_Off();
/* Reset status variable of ADC unitary conversion before performing */
/* a new ADC conversion start. */
/* Note: Optionally, for this example purpose, check ADC unitary */
/* conversion status before starting another ADC conversion. */
if (ubAdcGrpRegularUnitaryConvStatus != 0)
{
ubAdcGrpRegularUnitaryConvStatus = 0;
}
else
{
/* Error: Previous action (ADC conversion not yet completed). */
LED_Blinking(LED_BLINK_ERROR);
}
/* Init variable containing ADC conversion data */
uhADCxConvertedData = VAR_CONVERTED_DATA_INIT_VALUE;
/* Perform ADC group regular conversion start, poll for conversion */
/* completion. */
ConversionStartPoll_ADC_GrpRegular();
/* Retrieve ADC conversion data */
/* (data scale corresponds to ADC resolution: 12 bits) */
uhADCxConvertedData = LL_ADC_REG_ReadConversionData12(ADC1);
/* Update status variable of ADC unitary conversion */
ubAdcGrpRegularUnitaryConvStatus = 1;
/* Set LED depending on ADC unitary conversion status */
/* - Turn-on if ADC unitary conversion is completed */
/* - Turn-off if ADC unitary conversion is not completed */
LED_On();
/* Computation of ADC conversions raw data to physical values */
/* using LL ADC driver helper macro. */
hADCxConvertedData_Temperature_DegreeCelsius = __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(INTERNAL_TEMPSENSOR_AVGSLOPE,
INTERNAL_TEMPSENSOR_V25,
INTERNAL_TEMPSENSOR_V25_TEMP,
VDDA_APPLI,
uhADCxConvertedData,
LL_ADC_RESOLUTION_12B);
/* Note: ADC conversion data is stored into variable */
/* "uhADCxConvertedData". */
/* (for debug: see variable content into watch window). */
/* Note: Temperature from ADC internal temperature sensor is stored into */
/* into variable */
/* "hADCxConvertedData_Temperature_DegreeCelsius". */
/* (unit: degree Celsius) */
/* (for debug: see variable content into watch window). */
}
}
/**
* @brief Configure ADC (ADC instance: ADC1) and GPIO used by ADC channels.
* @note In case re-use of this function outside of this example:
* This function includes checks of ADC hardware constraints before
* executing some configuration functions.
* - In this example, all these checks are not necessary but are
* implemented anyway to show the best practice usages
* corresponding to reference manual procedure.
* (On some STM32 series, setting of ADC features are not
* conditioned to ADC state. However, in order to be compliant with
* other STM32 series and to show the best practice usages,
* ADC state is checked anyway with same constraints).
* Software can be optimized by removing some of these checks,
* if they are not relevant considering previous settings and actions
* in user application.
* - If ADC is not in the appropriate state to modify some parameters,
* the setting of these parameters is bypassed without error
* reporting:
* it can be the expected behavior in case of recall of this
* function to update only a few parameters (which update fulfills
* the ADC state).
* Otherwise, it is up to the user to set the appropriate error
* reporting in user application.
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_ADC(void)
{
__IO uint32_t wait_loop_index = 0;
/*## Configuration of GPIO used by ADC channels ############################*/
/* Note: On this STM32 device, ADC1 internal channel temperature sensor is mapped on GPIO pin PA.04 */
/* Enable GPIO Clock */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA);
/* Configure GPIO in analog mode to be used as ADC input */
LL_GPIO_SetPinMode(GPIOA, LL_GPIO_PIN_4, LL_GPIO_MODE_ANALOG);
/*## Configuration of NVIC #################################################*/
/* Configure NVIC to enable ADC1 interruptions */
NVIC_SetPriority(ADC1_IRQn, 0);
NVIC_EnableIRQ(ADC1_IRQn);
/*## Configuration of ADC ##################################################*/
/*## Configuration of ADC hierarchical scope: common to several ADC ########*/
/* Enable ADC clock (core clock) */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_ADC1);
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, in order to be compliant with other STM32 series */
/* and to show the best practice usages, ADC state is checked. */
/* Software can be optimized by removing some of these checks, if */
/* they are not relevant considering previous settings and actions */
/* in user application. */
if(__LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE() == 0)
{
/* Note: Call of the functions below are commented because they are */
/* useless in this example: */
/* setting corresponding to default configuration from reset state. */
/* Set ADC measurement path to internal channels */
LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_PATH_INTERNAL_TEMPSENSOR);
/* Delay for ADC temperature sensor stabilization time. */
/* Compute number of CPU cycles to wait for, from delay in us. */
/* Note: Variable divided by 2 to compensate partially */
/* CPU processing cycles (depends on compilation optimization). */
/* Note: If system core clock frequency is below 200kHz, wait time */
/* is only a few CPU processing cycles. */
/* Note: This delay is implemented here for the purpose in this example. */
/* It can be optimized if merged with other delays */
/* during ADC activation or if other actions are performed */
/* in the meantime. */
wait_loop_index = ((LL_ADC_DELAY_TEMPSENSOR_STAB_US * (SystemCoreClock / (100000 * 2))) / 10);
while(wait_loop_index != 0)
{
wait_loop_index--;
}
/*## Configuration of ADC hierarchical scope: multimode ####################*/
/* Set ADC multimode configuration */
// LL_ADC_SetMultimode(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_MULTI_INDEPENDENT);
/* Set ADC multimode DMA transfer */
// LL_ADC_SetMultiDMATransfer(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_MULTI_REG_DMA_EACH_ADC);
/* Set ADC multimode: delay between 2 sampling phases */
// LL_ADC_SetMultiTwoSamplingDelay(__LL_ADC_COMMON_INSTANCE(ADC1), LL_ADC_MULTI_TWOSMP_DELAY_1CYCLE);
}
/*## Configuration of ADC hierarchical scope: ADC instance #################*/
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, ADC state is checked anyway with standard requirements */
/* (refer to description of this function). */
if (LL_ADC_IsEnabled(ADC1) == 0)
{
/* Note: Call of the functions below are commented because they are */
/* useless in this example: */
/* setting corresponding to default configuration from reset state. */
/* Set ADC conversion data alignment */
// LL_ADC_SetResolution(ADC1, LL_ADC_DATA_ALIGN_RIGHT);
/* Set Set ADC sequencers scan mode, for all ADC groups */
/* (group regular, group injected). */
// LL_ADC_SetSequencersScanMode(ADC1, LL_ADC_SEQ_SCAN_DISABLE);
}
/*## Configuration of ADC hierarchical scope: ADC group regular ############*/
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, ADC state is checked anyway with standard requirements */
/* (refer to description of this function). */
if (LL_ADC_IsEnabled(ADC1) == 0)
{
/* Set ADC group regular trigger source */
LL_ADC_REG_SetTriggerSource(ADC1, LL_ADC_REG_TRIG_SOFTWARE);
/* Set ADC group regular trigger polarity */
// LL_ADC_REG_SetTriggerEdge(ADC1, LL_ADC_REG_TRIG_EXT_RISING);
/* Set ADC group regular continuous mode */
LL_ADC_REG_SetContinuousMode(ADC1, LL_ADC_REG_CONV_SINGLE);
/* Set ADC group regular conversion data transfer */
// LL_ADC_REG_SetDMATransfer(ADC1, LL_ADC_REG_DMA_TRANSFER_NONE);
/* Set ADC group regular sequencer */
/* Note: On this STM32 series, ADC group regular sequencer is */
/* fully configurable: sequencer length and each rank */
/* affectation to a channel are configurable. */
/* Refer to description of function */
/* "LL_ADC_REG_SetSequencerLength()". */
/* Set ADC group regular sequencer length and scan direction */
LL_ADC_REG_SetSequencerLength(ADC1, LL_ADC_REG_SEQ_SCAN_DISABLE);
/* Set ADC group regular sequencer discontinuous mode */
// LL_ADC_REG_SetSequencerDiscont(ADC1, LL_ADC_REG_SEQ_DISCONT_DISABLE);
/* Set ADC group regular sequence: channel on the selected sequence rank. */
LL_ADC_REG_SetSequencerRanks(ADC1, LL_ADC_REG_RANK_1, LL_ADC_CHANNEL_TEMPSENSOR);
}
/*## Configuration of ADC hierarchical scope: ADC group injected ###########*/
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, ADC state is checked anyway with standard requirements */
/* (refer to description of this function). */
if (LL_ADC_IsEnabled(ADC1) == 0)
{
/* Note: Call of the functions below are commented because they are */
/* useless in this example: */
/* setting corresponding to default configuration from reset state. */
/* Set ADC group injected trigger source */
// LL_ADC_INJ_SetTriggerSource(ADC1, LL_ADC_INJ_TRIG_SOFTWARE);
/* Set ADC group injected trigger polarity */
// LL_ADC_INJ_SetTriggerEdge(ADC1, LL_ADC_INJ_TRIG_EXT_RISING);
/* Set ADC group injected conversion trigger */
// LL_ADC_INJ_SetTrigAuto(ADC1, LL_ADC_INJ_TRIG_INDEPENDENT);
/* Set ADC group injected sequencer */
/* Note: On this STM32 series, ADC group injected sequencer is */
/* fully configurable: sequencer length and each rank */
/* affectation to a channel are configurable. */
/* Refer to description of function */
/* "LL_ADC_INJ_SetSequencerLength()". */
/* Set ADC group injected sequencer length and scan direction */
// LL_ADC_INJ_SetSequencerLength(ADC1, LL_ADC_INJ_SEQ_SCAN_DISABLE);
/* Set ADC group injected sequencer discontinuous mode */
// LL_ADC_INJ_SetSequencerDiscont(ADC1, LL_ADC_INJ_SEQ_DISCONT_DISABLE);
/* Set ADC group injected sequence: channel on the selected sequence rank. */
// LL_ADC_INJ_SetSequencerRanks(ADC1, LL_ADC_INJ_RANK_1, LL_ADC_CHANNEL_TEMPSENSOR);
}
/*## Configuration of ADC hierarchical scope: channels #####################*/
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, in order to be compliant with other STM32 series */
/* and to show the best practice usages, ADC state is checked. */
/* Software can be optimized by removing some of these checks, if */
/* they are not relevant considering previous settings and actions */
/* in user application. */
if (LL_ADC_IsEnabled(ADC1) == 0)
{
/* Set ADC channels sampling time */
/* Note: Set long sampling time due to internal channels (VrefInt, */
/* temperature sensor) constraints. */
/* Refer to description of function */
/* "LL_ADC_SetChannelSamplingTime()". */
LL_ADC_SetChannelSamplingTime(ADC1, LL_ADC_CHANNEL_TEMPSENSOR, LL_ADC_SAMPLINGTIME_239CYCLES_5);
}
/*## Configuration of ADC transversal scope: analog watchdog ###############*/
/* Note: On this STM32 series, there is only 1 analog watchdog available. */
/* Set ADC analog watchdog: channels to be monitored */
// LL_ADC_SetAnalogWDMonitChannels(ADC1, LL_ADC_AWD_DISABLE);
/* Set ADC analog watchdog: thresholds */
// LL_ADC_SetAnalogWDThresholds(ADC1, LL_ADC_AWD_THRESHOLD_HIGH, __LL_ADC_DIGITAL_SCALE(LL_ADC_RESOLUTION_12B));
// LL_ADC_SetAnalogWDThresholds(ADC1, LL_ADC_AWD_THRESHOLD_LOW, 0x000);
/*## Configuration of ADC transversal scope: oversampling ##################*/
/* Note: Feature not available on this STM32 series */
/*## Configuration of ADC interruptions ####################################*/
/* Note: In this example, no ADC interruption enabled */
/* Note: In this example, end of ADC conversions are awaited by polling */
/* (not by interruption). */
}
/**
* @brief Perform ADC activation procedure to make it ready to convert
* (ADC instance: ADC1).
* @note Operations:
* - ADC instance
* - Run ADC self calibration
* - Enable ADC
* - ADC group regular
* none: ADC conversion start-stop to be performed
* after this function
* - ADC group injected
* none: ADC conversion start-stop to be performed
* after this function
* @param None
* @retval None
*/
void Activate_ADC(void)
{
__IO uint32_t wait_loop_index = 0;
#if (USE_TIMEOUT == 1)
uint32_t Timeout = 0; /* Variable used for timeout management */
#endif /* USE_TIMEOUT */
/*## Operation on ADC hierarchical scope: ADC instance #####################*/
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, in order to be compliant with other STM32 series */
/* and to show the best practice usages, ADC state is checked. */
/* Software can be optimized by removing some of these checks, if */
/* they are not relevant considering previous settings and actions */
/* in user application. */
if (LL_ADC_IsEnabled(ADC1) == 0)
{
/* Enable ADC */
LL_ADC_Enable(ADC1);
/* Delay between ADC enable and ADC start of calibration. */
/* Note: Variable divided by 2 to compensate partially */
/* CPU processing cycles (depends on compilation optimization). */
wait_loop_index = (ADC_DELAY_ENABLE_CALIB_CPU_CYCLES >> 1);
while(wait_loop_index != 0)
{
wait_loop_index--;
}
/* Run ADC self calibration */
LL_ADC_StartCalibration(ADC1);
/* Poll for ADC effectively calibrated */
#if (USE_TIMEOUT == 1)
Timeout = ADC_CALIBRATION_TIMEOUT_MS;
#endif /* USE_TIMEOUT */
while (LL_ADC_IsCalibrationOnGoing(ADC1) != 0)
{
#if (USE_TIMEOUT == 1)
/* Check Systick counter flag to decrement the time-out value */
if (LL_SYSTICK_IsActiveCounterFlag())
{
if(Timeout-- == 0)
{
/* Time-out occurred. Set LED to blinking mode */
LED_Blinking(LED_BLINK_ERROR);
}
}
#endif /* USE_TIMEOUT */
}
}
/*## Operation on ADC hierarchical scope: ADC group regular ################*/
/* Note: No operation on ADC group regular performed here. */
/* ADC group regular conversions to be performed after this function */
/* using function: */
/* "LL_ADC_REG_StartConversion();" */
/*## Operation on ADC hierarchical scope: ADC group injected ###############*/
/* Note: No operation on ADC group injected performed here. */
/* ADC group injected conversions to be performed after this function */
/* using function: */
/* "LL_ADC_INJ_StartConversion();" */
}
/**
* @brief Perform ADC group regular conversion start, poll for conversion
* completion.
* (ADC instance: ADC1).
* @note This function does not perform ADC group regular conversion stop:
* intended to be used with ADC in single mode, trigger SW start
* (only 1 ADC conversion done at each trigger, no conversion stop
* needed).
* In case of continuous mode or conversion trigger set to
* external trigger, ADC group regular conversion stop must be added.
* @param None
* @retval None
*/
void ConversionStartPoll_ADC_GrpRegular(void)
{
#if (USE_TIMEOUT == 1)
uint32_t Timeout = 0; /* Variable used for timeout management */
#endif /* USE_TIMEOUT */
/* Start ADC group regular conversion */
/* Note: Hardware constraint (refer to description of the functions */
/* below): */
/* On this STM32 series, setting of these features are not */
/* conditioned to ADC state. */
/* However, in order to be compliant with other STM32 series */
/* and to show the best practice usages, ADC state is checked. */
/* Software can be optimized by removing some of these checks, if */
/* they are not relevant considering previous settings and actions */
/* in user application. */
if (LL_ADC_IsEnabled(ADC1) == 1)
{
LL_ADC_REG_StartConversionSWStart(ADC1);
}
else
{
/* Error: ADC conversion start could not be performed */
LED_Blinking(LED_BLINK_ERROR);
}
#if (USE_TIMEOUT == 1)
Timeout = ADC_UNITARY_CONVERSION_TIMEOUT_MS;
#endif /* USE_TIMEOUT */
while (LL_ADC_IsActiveFlag_EOS(ADC1) == 0)
{
#if (USE_TIMEOUT == 1)
/* Check Systick counter flag to decrement the time-out value */
if (LL_SYSTICK_IsActiveCounterFlag())
{
if(Timeout-- == 0)
{
/* Time-out occurred. Set LED to blinking mode */
LED_Blinking(LED_BLINK_SLOW);
}
}
#endif /* USE_TIMEOUT */
}
/* Clear flag ADC group regular end of unitary conversion */
/* Note: This action is not needed here, because flag ADC group regular */
/* end of unitary conversion is cleared automatically when */
/* software reads conversion data from ADC data register. */
/* Nevertheless, this action is done anyway to show how to clear */
/* this flag, needed if conversion data is not always read */
/* or if group injected end of unitary conversion is used (for */
/* devices with group injected available). */
LL_ADC_ClearFlag_EOS(ADC1);
}
/**
* @brief Initialize LED2.
* @param None
* @retval None
*/
void LED_Init(void)
{
/* Enable the LED2 Clock */
LED2_GPIO_CLK_ENABLE();
/* Configure IO in output push-pull mode to drive external LED2 */
LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
/* Reset value is LL_GPIO_OUTPUT_PUSHPULL */
//LL_GPIO_SetPinOutputType(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_OUTPUT_PUSHPULL);
/* Reset value is LL_GPIO_SPEED_FREQ_LOW */
//LL_GPIO_SetPinSpeed(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_SPEED_FREQ_LOW);
/* Reset value is LL_GPIO_PULL_DOWN */
//LL_GPIO_SetPinPull(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_PULL_DOWN);
}
/**
* @brief Turn-on LED2.
* @param None
* @retval None
*/
void LED_On(void)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Turn-off LED2.
* @param None
* @retval None
*/
void LED_Off(void)
{
/* Turn LED2 off */
LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Set LED2 to Blinking mode for an infinite loop (toggle period based on value provided as input parameter).
* @param Period : Period of time (in ms) between each toggling of LED
* This parameter can be user defined values. Pre-defined values used in that example are :
* @arg LED_BLINK_FAST : Fast Blinking
* @arg LED_BLINK_SLOW : Slow Blinking
* @arg LED_BLINK_ERROR : Error specific Blinking
* @retval None
*/
void LED_Blinking(uint32_t Period)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
/* Toggle IO in an infinite loop */
while (1)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(Period);
}
}
/**
* @brief Configures User push-button in EXTI Line Mode.
* @param None
* @retval None
*/
void UserButton_Init(void)
{
/* Enable the BUTTON Clock */
USER_BUTTON_GPIO_CLK_ENABLE();
/* Configure GPIO for BUTTON */
LL_GPIO_SetPinMode(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_MODE_INPUT);
LL_GPIO_SetPinPull(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_PULL_DOWN);
/* if(Button_Mode == BUTTON_MODE_EXTI) */
{
/* Connect External Line to the GPIO */
USER_BUTTON_SYSCFG_SET_EXTI();
/* Enable a rising trigger EXTI line 13 Interrupt */
USER_BUTTON_EXTI_LINE_ENABLE();
USER_BUTTON_EXTI_FALLING_TRIG_ENABLE();
/* Configure NVIC for USER_BUTTON_EXTI_IRQn */
NVIC_EnableIRQ(USER_BUTTON_EXTI_IRQn);
NVIC_SetPriority(USER_BUTTON_EXTI_IRQn,0x03);
}
}
/**
* @brief System Clock Configuration
* The system Clock is configured as follow :
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 72000000
* HCLK(Hz) = 72000000
* AHB Prescaler = 1
* APB1 Prescaler = 2
* APB2 Prescaler = 1
* HSE Frequency(Hz) = 8000000
* PLLMUL = 9
* Flash Latency(WS) = 2
* @param None
* @retval None
*/
void SystemClock_Config(void)
{
/* Set FLASH latency */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
/* Enable HSE oscillator */
LL_RCC_HSE_EnableBypass();
LL_RCC_HSE_Enable();
while(LL_RCC_HSE_IsReady() != 1)
{
};
/* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
LL_RCC_PLL_Enable();
while(LL_RCC_PLL_IsReady() != 1)
{
};
/* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
};
/* Set APB1 & APB2 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
/* Set systick to 1ms in using frequency set to 72MHz */
LL_Init1msTick(72000000);
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(72000000);
}
/******************************************************************************/
/* USER IRQ HANDLER TREATMENT */
/******************************************************************************/
/**
* @brief Function to manage IRQ Handler
* @param None
* @retval None
*/
void UserButton_Callback(void)
{
ubUserButtonPressed = 1;
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_TemperatureSensor | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_TemperatureSensor\Src\stm32f1xx_it.c | /**
******************************************************************************
* @file Examples_LL/ADC/ADC_TemperatureSensor/Src/stm32f1xx_it.c
* @author MCD Application Team
* @brief Main Interrupt Service Routines.
* This file provides template for all exceptions handler and
* peripherals interrupt service routine.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_it.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup ADC_TemperatureSensor
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
/**
* @brief This function handles PendSVC exception.
* @param None
* @retval None
*/
void PendSV_Handler(void)
{
}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
void SysTick_Handler(void)
{
}
/******************************************************************************/
/* STM32F1xx Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @brief This function handles external lines 10 to 15 interrupt request.
* @param None
* @retval None
*/
void USER_BUTTON_IRQHANDLER(void)
{
/* Manage Flags */
if(LL_EXTI_IsActiveFlag_0_31(USER_BUTTON_EXTI_LINE) != RESET)
{
/* Call interruption treatment function */
UserButton_Callback();
/* Clear EXTI line flag */
/* Note: Clear flag after callback function to minimize user button */
/* switch debounce parasitics. */
LL_EXTI_ClearFlag_0_31(USER_BUTTON_EXTI_LINE);
}
}
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_TemperatureSensor | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\ADC\ADC_TemperatureSensor\Src\system_stm32f1xx.c | /**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC->CFGR &= 0xF8FF0000U;
#else
RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull = ( pllmull >> 18U) + 2U;
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
#endif
}
#else
pllmull = pllmull >> 18U;
if (pllmull != 0x0DU)
{
pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
pllmull = 13U / 2U;
}
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
else
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
#endif /* STM32F105xC */
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
(void)(tmpreg);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD->CRL = 0x44BB44BBU;
GPIOD->CRH = 0xBBBBBBBBU;
GPIOE->CRL = 0xB44444BBU;
GPIOE->CRH = 0xBBBBBBBBU;
GPIOF->CRL = 0x44BBBBBBU;
GPIOF->CRH = 0xBBBB4444U;
GPIOG->CRL = 0x44BBBBBBU;
GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1->BTCR[4U] = 0x00001091U;
FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\CRC\CRC_CalculateAndCheck | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\CRC\CRC_CalculateAndCheck\Inc\main.h | /**
******************************************************************************
* @file Examples_LL/CRC/CRC_CalculateAndCheck/Inc/main.h
* @author MCD Application Team
* @brief Header for main.c module
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_ll_bus.h"
#include "stm32f1xx_ll_rcc.h"
#include "stm32f1xx_ll_system.h"
#include "stm32f1xx_ll_utils.h"
#include "stm32f1xx_ll_gpio.h"
#include "stm32f1xx_ll_crc.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/**
* @brief LED2
*/
#define LED2_PIN LL_GPIO_PIN_5
#define LED2_GPIO_PORT GPIOA
#define LED2_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA)
/**
* @brief Toggle periods for various blinking modes
*/
#define LED_BLINK_FAST 200
#define LED_BLINK_SLOW 500
#define LED_BLINK_ERROR 1000
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
#endif /* __MAIN_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\CRC\CRC_CalculateAndCheck | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\CRC\CRC_CalculateAndCheck\Inc\stm32f1xx_it.h | /**
******************************************************************************
* @file Examples_LL/CRC/CRC_CalculateAndCheck/Inc/stm32f1xx_it.h
* @author MCD Application Team
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_IT_H
#define __STM32F1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F1xx_IT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\CRC\CRC_CalculateAndCheck | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\CRC\CRC_CalculateAndCheck\Inc\stm32_assert.h | /**
******************************************************************************
* @file stm32_assert.h
* @author MCD Application Team
* @brief STM32 assert template file.
* This file should be copied to the application folder and renamed
* to stm32_assert.h.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_ASSERT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\CRC\CRC_CalculateAndCheck | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\CRC\CRC_CalculateAndCheck\Src\main.c | /**
******************************************************************************
* @file Examples_LL/CRC/CRC_CalculateAndCheck/Src/main.c
* @author MCD Application Team
* @brief This example describes how to use CRC peripheral for generating CRC value
* for an input data Buffer using the STM32F1xx CRC LL API.
* Peripheral initialization done using LL unitary services functions.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup CRC_CalculateAndCheck
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
#define BUFFER_SIZE 36 /* 9 u32 */
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Used for storing CRC Value */
__IO uint32_t uwCRCValue = 0;
static const uint8_t aDataBuffer[BUFFER_SIZE] =
{
0x21, 0x10, 0x00, 0x00, 0x63, 0x30, 0x42, 0x20, 0xa5, 0x50, 0x84, 0x40,
0xe7, 0x70, 0xc6, 0x60, 0x4a, 0xa1, 0x29, 0x91, 0x8c, 0xc1, 0x6b, 0xb1,
0xce, 0xe1, 0xad, 0xd1, 0x31, 0x12, 0xef, 0xf1, 0x52, 0x22, 0x73, 0x32,
};
/* Expected CRC Value */
uint32_t uwExpectedCRCValue = 0xFF813A5C;
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void Configure_CRC(void);
uint32_t Calculate_CRC(uint32_t);
void CheckCRCResultValue(void);
void LED_Init(void);
void LED_On(void);
void LED_Blinking(uint32_t Period);
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/* Configure the system clock to 72 MHz */
SystemClock_Config();
/* Initialize LED2 */
LED_Init();
/* Configure CRC (CRC IP configuration using default Polynomial value) */
Configure_CRC();
/* Perform CRC calculation on data contained in aDataBuffer */
uwCRCValue = Calculate_CRC(BUFFER_SIZE);
/* Check if CRC computed result value is equal to expected one */
CheckCRCResultValue();
/* Infinite loop */
while (1)
{
}
}
/**
* @brief This function configures CRC Instance.
* @note This function is used to enable CRC Peripheral clock
* @param None
* @retval None
*/
void Configure_CRC(void)
{
/* Enable peripheral clock for CRC *********************/
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_CRC);
}
/**
* @brief This function performs CRC calculation on BufferSize bytes from input data buffer aDataBuffer.
* @param BufferSize Nb of bytes to be processed for CRC calculation
* @retval 32-bit CRC value computed on input data buffer
*/
uint32_t Calculate_CRC(uint32_t BufferSize)
{
register uint32_t data = 0;
register uint32_t index = 0;
/* Compute the CRC of Data Buffer array*/
for (index = 0; index < (BufferSize / 4); index++)
{
data = (uint32_t)((aDataBuffer[4 * index + 3] << 24) | (aDataBuffer[4 * index + 2] << 16) | (aDataBuffer[4 * index + 1] << 8) | aDataBuffer[4 * index]);
LL_CRC_FeedData32(CRC, data);
}
/* Return computed CRC value */
return(LL_CRC_ReadData32(CRC));
}
/**
* @brief Check CRC computation result value.
* @param None
* @retval None
*/
void CheckCRCResultValue(void)
{
/* Compare the CRC value to the Expected one */
if (uwCRCValue != uwExpectedCRCValue)
{
/* Wrong CRC value: Set LED2 to Blinking mode (Error) */
LED_Blinking(LED_BLINK_ERROR);
}
else
{
/* Right CRC value: Turn LED2 on */
LED_On();
}
}
/**
* @brief Initialize LED2.
* @param None
* @retval None
*/
void LED_Init(void)
{
/* Enable the LED2 Clock */
LED2_GPIO_CLK_ENABLE();
/* Configure IO in output push-pull mode to drive external LED2 */
LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
/* Reset value is LL_GPIO_OUTPUT_PUSHPULL */
//LL_GPIO_SetPinOutputType(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_OUTPUT_PUSHPULL);
/* Reset value is LL_GPIO_SPEED_FREQ_LOW */
//LL_GPIO_SetPinSpeed(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_SPEED_FREQ_LOW);
/* Reset value is LL_GPIO_PULL_NO */
//LL_GPIO_SetPinPull(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_PULL_NO);
}
/**
* @brief Turn-on LED2.
* @param None
* @retval None
*/
void LED_On(void)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Set LED2 to Blinking mode for an infinite loop (toggle period based on value provided as input parameter).
* @param Period : Period of time (in ms) between each toggling of LED
* This parameter can be user defined values. Pre-defined values used in that example are :
* @arg LED_BLINK_FAST : Fast Blinking
* @arg LED_BLINK_SLOW : Slow Blinking
* @arg LED_BLINK_ERROR : Error specific Blinking
* @retval None
*/
void LED_Blinking(uint32_t Period)
{
/* Toggle IO in an infinite loop */
while (1)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(Period);
}
}
/**
* @brief System Clock Configuration
* The system Clock is configured as follow :
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 72000000
* HCLK(Hz) = 72000000
* AHB Prescaler = 1
* APB1 Prescaler = 2
* APB2 Prescaler = 1
* HSE Frequency(Hz) = 8000000
* PLLMUL = 9
* Flash Latency(WS) = 2
* @param None
* @retval None
*/
void SystemClock_Config(void)
{
/* Set FLASH latency */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
/* Enable HSE oscillator */
LL_RCC_HSE_EnableBypass();
LL_RCC_HSE_Enable();
while(LL_RCC_HSE_IsReady() != 1)
{
};
/* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
LL_RCC_PLL_Enable();
while(LL_RCC_PLL_IsReady() != 1)
{
};
/* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
};
/* Set APB1 & APB2 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
/* Set systick to 1ms in using frequency set to 72MHz */
LL_Init1msTick(72000000);
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(72000000);
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\CRC\CRC_CalculateAndCheck | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\CRC\CRC_CalculateAndCheck\Src\stm32f1xx_it.c | /**
******************************************************************************
* @file Examples_LL/CRC/CRC_CalculateAndCheck/Src/stm32f1xx_it.c
* @author MCD Application Team
* @brief Main Interrupt Service Routines.
* This file provides template for all exceptions handler and
* peripherals interrupt service routine.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_it.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup CRC_CalculateAndCheck
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
/**
* @brief This function handles PendSVC exception.
* @param None
* @retval None
*/
void PendSV_Handler(void)
{
}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
void SysTick_Handler(void)
{
}
/******************************************************************************/
/* STM32F1xx Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\CRC\CRC_CalculateAndCheck | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\CRC\CRC_CalculateAndCheck\Src\system_stm32f1xx.c | /**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC->CFGR &= 0xF8FF0000U;
#else
RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull = ( pllmull >> 18U) + 2U;
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
#endif
}
#else
pllmull = pllmull >> 18U;
if (pllmull != 0x0DU)
{
pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
pllmull = 13U / 2U;
}
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
else
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
#endif /* STM32F105xC */
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
(void)(tmpreg);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD->CRL = 0x44BB44BBU;
GPIOD->CRH = 0xBBBBBBBBU;
GPIOE->CRL = 0xB44444BBU;
GPIOE->CRH = 0xBBBBBBBBU;
GPIOF->CRL = 0x44BBBBBBU;
GPIOF->CRH = 0xBBBB4444U;
GPIOG->CRL = 0x44BBBBBBU;
GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1->BTCR[4U] = 0x00001091U;
FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory\Inc\main.h | /**
******************************************************************************
* @file Examples_LL/DMA/DMA_CopyFromFlashToMemory/Inc/main.h
* @author MCD Application Team
* @brief Header for main.c module
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_ll_bus.h"
#include "stm32f1xx_ll_rcc.h"
#include "stm32f1xx_ll_pwr.h"
#include "stm32f1xx_ll_system.h"
#include "stm32f1xx_ll_utils.h"
#include "stm32f1xx_ll_gpio.h"
#include "stm32f1xx_ll_dma.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/**
* @brief LED2
*/
#define LED2_PIN LL_GPIO_PIN_5
#define LED2_GPIO_PORT GPIOA
#define LED2_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA)
/**
* @brief Toggle periods for various blinking modes
*/
#define LED_BLINK_FAST 200
#define LED_BLINK_SLOW 500
#define LED_BLINK_ERROR 1000
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
/* IRQ Handler treatment.*/
void TransferComplete(void);
void TransferError(void);
#endif /* __MAIN_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory\Inc\stm32f1xx_it.h | /**
******************************************************************************
* @file Examples_LL/DMA/DMA_CopyFromFlashToMemory/Inc/stm32f1xx_it.h
* @author MCD Application Team
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_IT_H
#define __STM32F1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void DMA1_Channel1_IRQHandler(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F1xx_IT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory\Inc\stm32_assert.h | /**
******************************************************************************
* @file stm32_assert.h
* @author MCD Application Team
* @brief STM32 assert template file.
* This file should be copied to the application folder and renamed
* to stm32_assert.h.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_ASSERT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory\Src\main.c | /**
******************************************************************************
* @file Examples_LL/DMA/DMA_CopyFromFlashToMemory/Src/main.c
* @author MCD Application Team
* @brief This example describes how to use a DMA channel to transfer
* a word data buffer from FLASH memory to embedded SRAM memory
* through the STM32F1xx DMA LL API.
* Peripheral initialization done using LL unitary services functions.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup DMA_CopyFromFlashToMemory
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
#define BUFFER_SIZE 32
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
static const uint32_t aSRC_Const_Buffer[BUFFER_SIZE] =
{
0x01020304, 0x05060708, 0x090A0B0C, 0x0D0E0F10,
0x11121314, 0x15161718, 0x191A1B1C, 0x1D1E1F20,
0x21222324, 0x25262728, 0x292A2B2C, 0x2D2E2F30,
0x31323334, 0x35363738, 0x393A3B3C, 0x3D3E3F40,
0x41424344, 0x45464748, 0x494A4B4C, 0x4D4E4F50,
0x51525354, 0x55565758, 0x595A5B5C, 0x5D5E5F60,
0x61626364, 0x65666768, 0x696A6B6C, 0x6D6E6F70,
0x71727374, 0x75767778, 0x797A7B7C, 0x7D7E7F80
};
static uint32_t aDST_Buffer[BUFFER_SIZE];
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void Configure_DMA(void);
uint8_t Buffercmp(uint32_t* pBuffer1, uint32_t* pBuffer2, uint32_t BufferLength);
void LED_Init(void);
void LED_On(void);
void LED_Blinking(uint32_t Period);
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/* Configure the system clock to 72 MHz */
SystemClock_Config();
/* Initialize LED2 */
LED_Init();
/* Configure DMA1 Channel 1 */
/* Enable DMA1 clock */
/* Configure the DMA functional parameters : */
/* - Transfer memory word to memory word in normal mode */
/* - Memory and Periph increment mode */
/* Configure NVIC for DMA transfer complete/error interrupts */
Configure_DMA();
/* Start the DMA transfer Flash to Memory */
LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_1);
/* Infinite loop */
while (1)
{
/* Transfer completion and comparison is done on interrupt callback directly */
}
}
/**
* @brief This function configures the DMA1 Channel 1 to copy data from
* Flash memory(aSRC_Const_Buffer) to Internal SRAM(aDST_Buffer).
* @note This function is used to :
* -1- Enable DMA1 clock
* -2- Configure the DMA functional parameters
* -3- Configure NVIC for DMA transfer complete/error interrupts
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_DMA(void)
{
/* (1) Enable the clock of DMA1 */
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1);
/* (2) Configure the DMA functional parameters */
/* Configuration of the DMA parameters can be done using unitary functions or using the specific configure function */
/* Unitary Functions */
LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_1, LL_DMA_DIRECTION_MEMORY_TO_MEMORY);
LL_DMA_SetChannelPriorityLevel(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PRIORITY_HIGH);
LL_DMA_SetMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MODE_NORMAL);
LL_DMA_SetPeriphIncMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PERIPH_INCREMENT);
LL_DMA_SetMemoryIncMode(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MEMORY_INCREMENT);
LL_DMA_SetPeriphSize(DMA1, LL_DMA_CHANNEL_1, LL_DMA_PDATAALIGN_WORD);
LL_DMA_SetMemorySize(DMA1, LL_DMA_CHANNEL_1, LL_DMA_MDATAALIGN_WORD);
/* Configure Function */
// LL_DMA_ConfigTransfer(DMA1, LL_DMA_CHANNEL_1, LL_DMA_DIRECTION_MEMORY_TO_MEMORY |
// LL_DMA_PRIORITY_HIGH |
// LL_DMA_MODE_NORMAL |
// LL_DMA_PERIPH_INCREMENT |
// LL_DMA_MEMORY_INCREMENT |
// LL_DMA_PDATAALIGN_WORD |
// LL_DMA_MDATAALIGN_WORD);
LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_1, BUFFER_SIZE);
LL_DMA_ConfigAddresses(DMA1, LL_DMA_CHANNEL_1, (uint32_t)&aSRC_Const_Buffer, (uint32_t)&aDST_Buffer, LL_DMA_GetDataTransferDirection(DMA1, LL_DMA_CHANNEL_1));
/* (3) Configure NVIC for DMA transfer complete/error interrupts */
LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_1);
LL_DMA_EnableIT_TE(DMA1, LL_DMA_CHANNEL_1);
NVIC_SetPriority(DMA1_Channel1_IRQn, 0);
NVIC_EnableIRQ(DMA1_Channel1_IRQn);
}
/**
* @brief Compares two buffers.
* @param pBuffer1, pBuffer2: buffers to be compared.
* @param BufferLength: buffer's length
* @retval 0: pBuffer identical to pBuffer1
* 1: pBuffer differs from pBuffer1
*/
uint8_t Buffercmp(uint32_t* pBuffer1, uint32_t* pBuffer2, uint32_t BufferLength)
{
while (BufferLength--)
{
if (*pBuffer1 != *pBuffer2)
{
return 1;
}
pBuffer1++;
pBuffer2++;
}
return 0;
}
/**
* @brief Initialize LED2.
* @param None
* @retval None
*/
void LED_Init(void)
{
/* Enable the LED2 Clock */
LED2_GPIO_CLK_ENABLE();
/* Configure IO in output push-pull mode to drive external LED2 */
LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
}
/**
* @brief Turn-on LED2.
* @param None
* @retval None
*/
void LED_On(void)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Set LED2 to Blinking mode for an infinite loop (toggle period based on value provided as input parameter).
* @param Period : Period of time (in ms) between each toggling of LED
* This parameter can be user defined values. Pre-defined values used in that example are :
* @arg LED_BLINK_FAST : Fast Blinking
* @arg LED_BLINK_SLOW : Slow Blinking
* @arg LED_BLINK_ERROR : Error specific Blinking
* @retval None
*/
void LED_Blinking(uint32_t Period)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
/* Toggle IO in an infinite loop */
while (1)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(Period);
}
}
/**
* @brief System Clock Configuration
* The system Clock is configured as follow :
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 72000000
* HCLK(Hz) = 72000000
* AHB Prescaler = 1
* APB1 Prescaler = 2
* APB2 Prescaler = 1
* HSE Frequency(Hz) = 8000000
* PLLMUL = 9
* Flash Latency(WS) = 2
* @param None
* @retval None
*/
void SystemClock_Config(void)
{
/* Set FLASH latency */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
/* Enable HSE oscillator */
LL_RCC_HSE_EnableBypass();
LL_RCC_HSE_Enable();
while(LL_RCC_HSE_IsReady() != 1)
{
};
/* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
LL_RCC_PLL_Enable();
while(LL_RCC_PLL_IsReady() != 1)
{
};
/* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
};
/* Set APB1 & APB2 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
/* Set systick to 1ms in using frequency set to 72MHz */
LL_Init1msTick(72000000);
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(72000000);
}
/******************************************************************************/
/* USER IRQ HANDLER TREATMENT */
/******************************************************************************/
/**
* @brief DMA transfer complete callback
* @note This function is executed when the transfer complete interrupt
* is generated
* @retval None
*/
void TransferComplete()
{
/* DMA transfer completed */
/* Verify the data transferred */
if (Buffercmp((uint32_t*)aSRC_Const_Buffer, (uint32_t*)aDST_Buffer, BUFFER_SIZE) == 1)
{
/* DMA data transferred not consistency */
LED_Blinking(LED_BLINK_ERROR);
}
/* DMA data transferred consistency */
LED_On();
}
/**
* @brief DMA transfer error callback
* @note This function is executed when the transfer error interrupt
* is generated during DMA transfer
* @retval None
*/
void TransferError()
{
/* Error detected during DMA transfer */
LED_Blinking(LED_BLINK_ERROR);
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory\Src\stm32f1xx_it.c | /**
******************************************************************************
* @file Examples_LL/DMA/DMA_CopyFromFlashToMemory/Src/stm32f1xx_it.c
* @author MCD Application Team
* @brief Main Interrupt Service Routines.
* This file provides template for all exceptions handler and
* peripherals interrupt service routine.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_it.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup DMA_CopyFromFlashToMemory
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
/**
* @brief This function handles PendSVC exception.
* @param None
* @retval None
*/
void PendSV_Handler(void)
{
}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
void SysTick_Handler(void)
{
}
/******************************************************************************/
/* STM32F1xx Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @brief This function handles DMA1 channel1 interrupt request.
* @param None
* @retval None
*/
void DMA1_Channel1_IRQHandler(void)
{
if(LL_DMA_IsActiveFlag_TC1(DMA1) == 1)
{
LL_DMA_ClearFlag_TC1(DMA1);
TransferComplete();
}
else if(LL_DMA_IsActiveFlag_TE1(DMA1) == 1)
{
TransferError();
}
}
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory\Src\system_stm32f1xx.c | /**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC->CFGR &= 0xF8FF0000U;
#else
RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull = ( pllmull >> 18U) + 2U;
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
#endif
}
#else
pllmull = pllmull >> 18U;
if (pllmull != 0x0DU)
{
pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
pllmull = 13U / 2U;
}
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
else
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
#endif /* STM32F105xC */
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
(void)(tmpreg);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD->CRL = 0x44BB44BBU;
GPIOD->CRH = 0xBBBBBBBBU;
GPIOE->CRL = 0xB44444BBU;
GPIOE->CRH = 0xBBBBBBBBU;
GPIOF->CRL = 0x44BBBBBBU;
GPIOF->CRH = 0xBBBB4444U;
GPIOG->CRL = 0x44BBBBBBU;
GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1->BTCR[4U] = 0x00001091U;
FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory_Init\Inc\main.h | /**
******************************************************************************
* @file Examples_LL/DMA/DMA_CopyFromFlashToMemory/Inc/main.h
* @author MCD Application Team
* @brief Header for main.c module
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_ll_bus.h"
#include "stm32f1xx_ll_rcc.h"
#include "stm32f1xx_ll_pwr.h"
#include "stm32f1xx_ll_system.h"
#include "stm32f1xx_ll_utils.h"
#include "stm32f1xx_ll_gpio.h"
#include "stm32f1xx_ll_dma.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/**
* @brief LED2
*/
#define LED2_PIN LL_GPIO_PIN_5
#define LED2_GPIO_PORT GPIOA
#define LED2_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA)
/**
* @brief Toggle periods for various blinking modes
*/
#define LED_BLINK_FAST 200
#define LED_BLINK_SLOW 500
#define LED_BLINK_ERROR 1000
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
/* IRQ Handler treatment.*/
void TransferComplete(void);
void TransferError(void);
#endif /* __MAIN_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory_Init\Inc\stm32f1xx_it.h | /**
******************************************************************************
* @file Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/Inc/stm32f1xx_it.h
* @author MCD Application Team
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_IT_H
#define __STM32F1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void DMA1_Channel1_IRQHandler(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F1xx_IT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory_Init\Inc\stm32_assert.h | /**
******************************************************************************
* @file stm32_assert.h
* @author MCD Application Team
* @brief STM32 assert template file.
* This file should be copied to the application folder and renamed
* to stm32_assert.h.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_ASSERT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory_Init\Src\main.c | /**
******************************************************************************
* @file Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/Src/main.c
* @author MCD Application Team
* @brief This example describes how to use a DMA channel to transfer
* a word data buffer from FLASH memory to embedded SRAM memory
* through the STM32F1xx DMA LL API.
* Peripheral initialization done using LL initialization function.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup DMA_CopyFromFlashToMemory_Init
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
#define BUFFER_SIZE 32
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
static const uint32_t aSRC_Const_Buffer[BUFFER_SIZE] =
{
0x01020304, 0x05060708, 0x090A0B0C, 0x0D0E0F10,
0x11121314, 0x15161718, 0x191A1B1C, 0x1D1E1F20,
0x21222324, 0x25262728, 0x292A2B2C, 0x2D2E2F30,
0x31323334, 0x35363738, 0x393A3B3C, 0x3D3E3F40,
0x41424344, 0x45464748, 0x494A4B4C, 0x4D4E4F50,
0x51525354, 0x55565758, 0x595A5B5C, 0x5D5E5F60,
0x61626364, 0x65666768, 0x696A6B6C, 0x6D6E6F70,
0x71727374, 0x75767778, 0x797A7B7C, 0x7D7E7F80
};
static uint32_t aDST_Buffer[BUFFER_SIZE];
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void Configure_DMA(void);
uint8_t Buffercmp(uint32_t* pBuffer1, uint32_t* pBuffer2, uint32_t BufferLength);
void LED_Init(void);
void LED_On(void);
void LED_Blinking(uint32_t Period);
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/* Configure the system clock to 72 MHz */
SystemClock_Config();
/* Initialize LED2 */
LED_Init();
/* Configure DMA1 Channel 1 */
/* Enable DMA1 clock */
/* Configure the DMA functional parameters : */
/* - Transfer memory word to memory word in normal mode */
/* - Memory and Periph increment mode */
/* Configure NVIC for DMA transfer complete/error interrupts */
Configure_DMA();
/* Start the DMA transfer Flash to Memory */
LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_1);
/* Infinite loop */
while (1)
{
/* Transfer completion and comparison is done on interrupt callback directly */
}
}
/**
* @brief This function configures the DMA1 Channel 1 to copy data from
* Flash memory(aSRC_Const_Buffer) to Internal SRAM(aDST_Buffer).
* @note This function is used to :
* -1- Enable DMA1 clock
* -2- Configure the DMA functional parameters
* -3- Configure NVIC for DMA transfer complete/error interrupts
* @param None
* @retval None
*/
void Configure_DMA(void)
{
LL_DMA_InitTypeDef dma_initstruct;
/* (1) Enable the clock of DMA1 */
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1);
/* (2) Configure the DMA functional parameters */
/* Reset DMA1 data registers */
if (LL_DMA_DeInit(DMA1, LL_DMA_CHANNEL_1) != SUCCESS)
{
/* Initialization Error */
LED_Blinking(LED_BLINK_ERROR);
}
/* Set fields of initialization structure:
* - Source base address: aSRC_Const_Buffer
* - Destination base address: aDST_Buffer
* - Transfer direction : Memory to memory
* - Source increment mode: Increment mode Enable
* - Destination increment mode: Increment mode Enable
* - Source data alignment: Word alignment
* - Destination data alignment: Word alignment
* - Number of data to transfer: BUFFER_SIZE
* - Transfer priority level: High priority
*/
dma_initstruct.PeriphOrM2MSrcAddress = (uint32_t)&aSRC_Const_Buffer;
dma_initstruct.MemoryOrM2MDstAddress = (uint32_t)&aDST_Buffer;
dma_initstruct.Direction = LL_DMA_DIRECTION_MEMORY_TO_MEMORY;
dma_initstruct.Mode = LL_DMA_MODE_NORMAL;
dma_initstruct.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_INCREMENT;
dma_initstruct.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT;
dma_initstruct.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_WORD;
dma_initstruct.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_WORD;
dma_initstruct.NbData = BUFFER_SIZE;
dma_initstruct.Priority = LL_DMA_PRIORITY_HIGH;
/* Initialize DMA instance according to parameters defined in initialization structure. */
if (LL_DMA_Init(DMA1, LL_DMA_CHANNEL_1, &dma_initstruct) != SUCCESS)
{
/* Initialization Error */
LED_Blinking(LED_BLINK_ERROR);
}
/* (3) Configure NVIC for DMA transfer complete/error interrupts */
LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_1);
LL_DMA_EnableIT_TE(DMA1, LL_DMA_CHANNEL_1);
NVIC_SetPriority(DMA1_Channel1_IRQn, 0);
NVIC_EnableIRQ(DMA1_Channel1_IRQn);
}
/**
* @brief Compares two buffers.
* @param pBuffer1, pBuffer2: buffers to be compared.
* @param BufferLength: buffer's length
* @retval 0: pBuffer identical to pBuffer1
* 1: pBuffer differs from pBuffer1
*/
uint8_t Buffercmp(uint32_t* pBuffer1, uint32_t* pBuffer2, uint32_t BufferLength)
{
while (BufferLength--)
{
if (*pBuffer1 != *pBuffer2)
{
return 1;
}
pBuffer1++;
pBuffer2++;
}
return 0;
}
/**
* @brief Initialize LED2.
* @param None
* @retval None
*/
void LED_Init(void)
{
/* Enable the LED2 Clock */
LED2_GPIO_CLK_ENABLE();
/* Configure IO in output push-pull mode to drive external LED2 */
LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
}
/**
* @brief Turn-on LED2.
* @param None
* @retval None
*/
void LED_On(void)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Set LED2 to Blinking mode for an infinite loop (toggle period based on value provided as input parameter).
* @param Period : Period of time (in ms) between each toggling of LED
* This parameter can be user defined values. Pre-defined values used in that example are :
* @arg LED_BLINK_FAST : Fast Blinking
* @arg LED_BLINK_SLOW : Slow Blinking
* @arg LED_BLINK_ERROR : Error specific Blinking
* @retval None
*/
void LED_Blinking(uint32_t Period)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
/* Toggle IO in an infinite loop */
while (1)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(Period);
}
}
/**
* @brief System Clock Configuration
* The system Clock is configured as follow :
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 72000000
* HCLK(Hz) = 72000000
* AHB Prescaler = 1
* APB1 Prescaler = 2
* APB2 Prescaler = 1
* HSE Frequency(Hz) = 8000000
* PLLMUL = 9
* Flash Latency(WS) = 2
* @param None
* @retval None
*/
void SystemClock_Config(void)
{
/* Set FLASH latency */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
/* Enable HSE oscillator */
LL_RCC_HSE_EnableBypass();
LL_RCC_HSE_Enable();
while(LL_RCC_HSE_IsReady() != 1)
{
};
/* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
LL_RCC_PLL_Enable();
while(LL_RCC_PLL_IsReady() != 1)
{
};
/* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
};
/* Set APB1 & APB2 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
/* Set systick to 1ms in using frequency set to 72MHz */
LL_Init1msTick(72000000);
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(72000000);
}
/******************************************************************************/
/* USER IRQ HANDLER TREATMENT */
/******************************************************************************/
/**
* @brief DMA transfer complete callback
* @note This function is executed when the transfer complete interrupt
* is generated
* @retval None
*/
void TransferComplete()
{
/* DMA transfer completed */
/* Verify the data transferred */
if (Buffercmp((uint32_t*)aSRC_Const_Buffer, (uint32_t*)aDST_Buffer, BUFFER_SIZE) == 1)
{
/* DMA data transferred not consistency */
LED_Blinking(LED_BLINK_ERROR);
}
/* DMA data transferred consistency */
LED_On();
}
/**
* @brief DMA transfer error callback
* @note This function is executed when the transfer error interrupt
* is generated during DMA transfer
* @retval None
*/
void TransferError()
{
/* Error detected during DMA transfer */
LED_Blinking(LED_BLINK_ERROR);
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory_Init\Src\stm32f1xx_it.c | /**
******************************************************************************
* @file Examples_LL/DMA/DMA_CopyFromFlashToMemory_Init/Src/stm32f1xx_it.c
* @author MCD Application Team
* @brief Main Interrupt Service Routines.
* This file provides template for all exceptions handler and
* peripherals interrupt service routine.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_it.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup DMA_CopyFromFlashToMemory_Init
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
/**
* @brief This function handles PendSVC exception.
* @param None
* @retval None
*/
void PendSV_Handler(void)
{
}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
void SysTick_Handler(void)
{
}
/******************************************************************************/
/* STM32F1xx Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @brief This function handles DMA1 channel1 interrupt request.
* @param None
* @retval None
*/
void DMA1_Channel1_IRQHandler(void)
{
if(LL_DMA_IsActiveFlag_TC1(DMA1) == 1)
{
LL_DMA_ClearFlag_TC1(DMA1);
TransferComplete();
}
else if(LL_DMA_IsActiveFlag_TE1(DMA1) == 1)
{
TransferError();
}
}
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\DMA\DMA_CopyFromFlashToMemory_Init\Src\system_stm32f1xx.c | /**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC->CFGR &= 0xF8FF0000U;
#else
RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull = ( pllmull >> 18U) + 2U;
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
#endif
}
#else
pllmull = pllmull >> 18U;
if (pllmull != 0x0DU)
{
pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
pllmull = 13U / 2U;
}
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
else
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
#endif /* STM32F105xC */
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
(void)(tmpreg);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD->CRL = 0x44BB44BBU;
GPIOD->CRH = 0xBBBBBBBBU;
GPIOE->CRL = 0xB44444BBU;
GPIOE->CRH = 0xBBBBBBBBU;
GPIOF->CRL = 0x44BBBBBBU;
GPIOF->CRH = 0xBBBB4444U;
GPIOG->CRL = 0x44BBBBBBU;
GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1->BTCR[4U] = 0x00001091U;
FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT\Inc\main.h | /**
******************************************************************************
* @file Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/main.h
* @author MCD Application Team
* @brief Header for main.c module
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_ll_bus.h"
#include "stm32f1xx_ll_rcc.h"
#include "stm32f1xx_ll_system.h"
#include "stm32f1xx_ll_utils.h"
#include "stm32f1xx_ll_pwr.h"
#include "stm32f1xx_ll_gpio.h"
#include "stm32f1xx_ll_exti.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/**
* @brief LED2
*/
#define LED2_PIN LL_GPIO_PIN_5
#define LED2_GPIO_PORT GPIOA
#define LED2_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA)
/**
* @brief Key push-button
*/
#define USER_BUTTON_PIN LL_GPIO_PIN_13
#define USER_BUTTON_GPIO_PORT GPIOC
#define USER_BUTTON_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOC)
#define USER_BUTTON_EXTI_LINE LL_EXTI_LINE_13
#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
#define USER_BUTTON_EXTI_LINE_ENABLE() LL_EXTI_EnableIT_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_EXTI_FALLING_TRIG_ENABLE() LL_EXTI_EnableFallingTrig_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_SYSCFG_SET_EXTI() do { \
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO); \
LL_GPIO_AF_SetEXTISource(LL_GPIO_AF_EXTI_PORTC, LL_GPIO_AF_EXTI_LINE13); \
} while(0)
#define USER_BUTTON_IRQHANDLER EXTI15_10_IRQHandler
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
/* IRQ Handler treatment UserKey_Callback*/
void UserButton_Callback(void);
#endif /* __MAIN_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT\Inc\stm32f1xx_it.h | /**
******************************************************************************
* @file Examples_LL/EXTI/EXTI_ToggleLedOnIT/Inc/stm32f1xx_it.h
* @author MCD Application Team
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_IT_H
#define __STM32F1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void USER_BUTTON_IRQHANDLER(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F1xx_IT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT\Inc\stm32_assert.h | /**
******************************************************************************
* @file stm32_assert.h
* @author MCD Application Team
* @brief STM32 assert template file.
* This file should be copied to the application folder and renamed
* to stm32_assert.h.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_ASSERT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT\Src\main.c | /**
******************************************************************************
* @file Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/main.c
* @author MCD Application Team
* @brief This example describes how to configure the EXTI and use
* GPIOs using the STM32F1xx LL API to toggles the available
* users Leds on the board when User button is pressed.
* Peripheral initialization done using LL unitary services functions.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup EXTI_ToggleLedOnIT
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void Configure_EXTI(void);
void LED_Init(void);
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/* Configure the system clock to 72 MHz */
SystemClock_Config();
/* Initialize LED2 */
LED_Init();
/* Configure the EXTI Line on User Button */
Configure_EXTI();
/* Infinite loop */
while (1)
{
}
}
/**
* @brief This function configures EXTI Line as Push-Button
* @note Peripheral configuration is minimal configuration from reset values.
* @param None
* @retval None
*/
void Configure_EXTI()
{
/* -1- GPIO Config */
/* Enable GPIO Clock (to be able to program the configuration registers) */
USER_BUTTON_GPIO_CLK_ENABLE();
/* Configure IO */
LL_GPIO_SetPinMode(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_MODE_INPUT);
/* -2- Connect External Line to the GPIO*/
USER_BUTTON_SYSCFG_SET_EXTI();
/*-3- Enable a falling trigger EXTI line 13 Interrupt */
USER_BUTTON_EXTI_LINE_ENABLE();
USER_BUTTON_EXTI_FALLING_TRIG_ENABLE();
/*-4- Configure NVIC for EXTI15_10_IRQn */
NVIC_EnableIRQ(USER_BUTTON_EXTI_IRQn);
NVIC_SetPriority(USER_BUTTON_EXTI_IRQn,0);
}
/**
* @brief Initialize LED2.
* @param None
* @retval None
*/
void LED_Init(void)
{
/* Enable the LED2 Clock */
LED2_GPIO_CLK_ENABLE();
/* Configure IO in output push-pull mode to drive external LED2 */
LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
/* Reset value is LL_GPIO_OUTPUT_PUSHPULL */
//LL_GPIO_SetPinOutputType(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_OUTPUT_PUSHPULL);
}
/**
* @brief System Clock Configuration
* The system Clock is configured as follow :
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 72000000
* HCLK(Hz) = 72000000
* AHB Prescaler = 1
* APB1 Prescaler = 2
* APB2 Prescaler = 1
* HSE Frequency(Hz) = 8000000
* PLLMUL = 9
* Flash Latency(WS) = 2
* @param None
* @retval None
*/
void SystemClock_Config(void)
{
/* Set FLASH latency */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
/* Enable HSE oscillator */
LL_RCC_HSE_EnableBypass();
LL_RCC_HSE_Enable();
while(LL_RCC_HSE_IsReady() != 1)
{
};
/* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
LL_RCC_PLL_Enable();
while(LL_RCC_PLL_IsReady() != 1)
{
};
/* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
};
/* Set APB1 & APB2 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
/* Set systick to 1ms in using frequency set to 72MHz */
LL_Init1msTick(72000000);
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(72000000);
}
/******************************************************************************/
/* USER IRQ HANDLER TREATMENT */
/******************************************************************************/
/**
* @brief Function to manage IRQ Handler
* @param None
* @retval None
*/
void UserButton_Callback(void)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT\Src\stm32f1xx_it.c | /**
******************************************************************************
* @file Examples_LL/EXTI/EXTI_ToggleLedOnIT/Src/stm32f1xx_it.c
* @author MCD Application Team
* @brief Main Interrupt Service Routines.
* This file provides template for all exceptions handler and
* peripherals interrupt service routine.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_it.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup EXTI_ToggleLedOnIT
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
/**
* @brief This function handles PendSVC exception.
* @param None
* @retval None
*/
void PendSV_Handler(void)
{
}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
void SysTick_Handler(void)
{
}
/******************************************************************************/
/* STM32F1xx Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (EXTI), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @brief This function handles external lines 10 to 15 interrupt request.
* @param None
* @retval None
*/
void USER_BUTTON_IRQHANDLER(void)
{
/* Manage Flags */
if(LL_EXTI_IsActiveFlag_0_31(USER_BUTTON_EXTI_LINE) != RESET)
{
LL_EXTI_ClearFlag_0_31(USER_BUTTON_EXTI_LINE);
/* Manage code in main.c.*/
UserButton_Callback();
}
}
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT\Src\system_stm32f1xx.c | /**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC->CFGR &= 0xF8FF0000U;
#else
RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull = ( pllmull >> 18U) + 2U;
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
#endif
}
#else
pllmull = pllmull >> 18U;
if (pllmull != 0x0DU)
{
pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
pllmull = 13U / 2U;
}
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
else
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
#endif /* STM32F105xC */
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
(void)(tmpreg);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD->CRL = 0x44BB44BBU;
GPIOD->CRH = 0xBBBBBBBBU;
GPIOE->CRL = 0xB44444BBU;
GPIOE->CRH = 0xBBBBBBBBU;
GPIOF->CRL = 0x44BBBBBBU;
GPIOF->CRH = 0xBBBB4444U;
GPIOG->CRL = 0x44BBBBBBU;
GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1->BTCR[4U] = 0x00001091U;
FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT_Init\Inc\main.h | /**
******************************************************************************
* @file Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/main.h
* @author MCD Application Team
* @brief Header for main.c module
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_ll_bus.h"
#include "stm32f1xx_ll_rcc.h"
#include "stm32f1xx_ll_system.h"
#include "stm32f1xx_ll_utils.h"
#include "stm32f1xx_ll_pwr.h"
#include "stm32f1xx_ll_gpio.h"
#include "stm32f1xx_ll_exti.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/**
* @brief LED2
*/
#define LED2_PIN LL_GPIO_PIN_5
#define LED2_GPIO_PORT GPIOA
#define LED2_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA)
/**
* @brief Key push-button
*/
#define USER_BUTTON_PIN LL_GPIO_PIN_13
#define USER_BUTTON_GPIO_PORT GPIOC
#define USER_BUTTON_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOC)
#define USER_BUTTON_EXTI_LINE LL_EXTI_LINE_13
#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
#define USER_BUTTON_EXTI_LINE_ENABLE() LL_EXTI_EnableIT_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_EXTI_FALLING_TRIG_ENABLE() LL_EXTI_EnableFallingTrig_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_SYSCFG_SET_EXTI() do { \
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO); \
LL_GPIO_AF_SetEXTISource(LL_GPIO_AF_EXTI_PORTC, LL_GPIO_AF_EXTI_LINE13); \
} while(0)
#define USER_BUTTON_IRQHANDLER EXTI15_10_IRQHandler
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
/* IRQ Handler treatment UserKey_Callback*/
void UserButton_Callback(void);
#endif /* __MAIN_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT_Init\Inc\stm32f1xx_it.h | /**
******************************************************************************
* @file Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Inc/stm32f1xx_it.h
* @author MCD Application Team
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_IT_H
#define __STM32F1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void USER_BUTTON_IRQHANDLER(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F1xx_IT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT_Init\Inc\stm32_assert.h | /**
******************************************************************************
* @file stm32_assert.h
* @author MCD Application Team
* @brief STM32 assert template file.
* This file should be copied to the application folder and renamed
* to stm32_assert.h.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_ASSERT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT_Init\Src\main.c | /**
******************************************************************************
* @file Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/main.c
* @author MCD Application Team
* @brief This example describes how to configure the EXTI and use
* GPIOs using the STM32F1xx LL API to toggles the available
* users Leds on the board when User button is pressed.
* Peripheral initialization done using LL initialization function.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup EXTI_ToggleLedOnIT_Init
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void Configure_EXTI(void);
void LED_Init(void);
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/* Configure the system clock to 72 MHz */
SystemClock_Config();
/* Initialize LED2 */
LED_Init();
/* Configure the EXTI Line on User Button */
Configure_EXTI();
/* Infinite loop */
while (1)
{
}
}
/**
* @brief This function configures EXTI Line as Push-Button
* @param None
* @retval None
*/
void Configure_EXTI()
{
LL_EXTI_InitTypeDef exti_initstruct;
/* -1- GPIO Config */
/* Enable GPIO Clock (to be able to program the configuration registers) */
USER_BUTTON_GPIO_CLK_ENABLE();
/* Configure IO */
LL_GPIO_SetPinMode(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_MODE_INPUT);
/* -2- Connect External Line to the GPIO*/
USER_BUTTON_SYSCFG_SET_EXTI();
/*-3- Enable a falling trigger EXTI line 13 Interrupt */
/* Set fields of initialization structure */
exti_initstruct.Line_0_31 = USER_BUTTON_EXTI_LINE;
exti_initstruct.LineCommand = ENABLE;
exti_initstruct.Mode = LL_EXTI_MODE_IT;
exti_initstruct.Trigger = LL_EXTI_TRIGGER_FALLING;
/* Initialize EXTI according to parameters defined in initialization structure. */
LL_EXTI_Init(&exti_initstruct);
/*-4- Configure NVIC for EXTI15_10_IRQn */
NVIC_EnableIRQ(USER_BUTTON_EXTI_IRQn);
NVIC_SetPriority(USER_BUTTON_EXTI_IRQn,0);
}
/**
* @brief Initialize LED2.
* @param None
* @retval None
*/
void LED_Init(void)
{
/* Enable the LED2 Clock */
LED2_GPIO_CLK_ENABLE();
/* Configure IO in output push-pull mode to drive external LED2 */
LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
/* Reset value is LL_GPIO_OUTPUT_PUSHPULL */
//LL_GPIO_SetPinOutputType(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_OUTPUT_PUSHPULL);
}
/**
* @brief System Clock Configuration
* The system Clock is configured as follow :
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 72000000
* HCLK(Hz) = 72000000
* AHB Prescaler = 1
* APB1 Prescaler = 2
* APB2 Prescaler = 1
* HSE Frequency(Hz) = 8000000
* PLLMUL = 9
* Flash Latency(WS) = 2
* @param None
* @retval None
*/
void SystemClock_Config(void)
{
/* Set FLASH latency */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
/* Enable HSE oscillator */
LL_RCC_HSE_EnableBypass();
LL_RCC_HSE_Enable();
while(LL_RCC_HSE_IsReady() != 1)
{
};
/* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
LL_RCC_PLL_Enable();
while(LL_RCC_PLL_IsReady() != 1)
{
};
/* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
};
/* Set APB1 & APB2 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
/* Set systick to 1ms in using frequency set to 72MHz */
LL_Init1msTick(72000000);
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(72000000);
}
/******************************************************************************/
/* USER IRQ HANDLER TREATMENT */
/******************************************************************************/
/**
* @brief Function to manage IRQ Handler
* @param None
* @retval None
*/
void UserButton_Callback(void)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT_Init\Src\stm32f1xx_it.c | /**
******************************************************************************
* @file Examples_LL/EXTI/EXTI_ToggleLedOnIT_Init/Src/stm32f1xx_it.c
* @author MCD Application Team
* @brief Main Interrupt Service Routines.
* This file provides template for all exceptions handler and
* peripherals interrupt service routine.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_it.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup EXTI_ToggleLedOnIT_Init
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
/**
* @brief This function handles PendSVC exception.
* @param None
* @retval None
*/
void PendSV_Handler(void)
{
}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
void SysTick_Handler(void)
{
}
/******************************************************************************/
/* STM32F1xx Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (EXTI), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @brief This function handles external lines 10 to 15 interrupt request.
* @param None
* @retval None
*/
void USER_BUTTON_IRQHANDLER(void)
{
/* Manage Flags */
if(LL_EXTI_IsActiveFlag_0_31(USER_BUTTON_EXTI_LINE) != RESET)
{
LL_EXTI_ClearFlag_0_31(USER_BUTTON_EXTI_LINE);
/* Manage code in main.c.*/
UserButton_Callback();
}
}
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\EXTI\EXTI_ToggleLedOnIT_Init\Src\system_stm32f1xx.c | /**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC->CFGR &= 0xF8FF0000U;
#else
RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull = ( pllmull >> 18U) + 2U;
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
#endif
}
#else
pllmull = pllmull >> 18U;
if (pllmull != 0x0DU)
{
pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
pllmull = 13U / 2U;
}
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
else
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
#endif /* STM32F105xC */
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
(void)(tmpreg);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD->CRL = 0x44BB44BBU;
GPIOD->CRH = 0xBBBBBBBBU;
GPIOE->CRL = 0xB44444BBU;
GPIOE->CRH = 0xBBBBBBBBU;
GPIOF->CRL = 0x44BBBBBBU;
GPIOF->CRH = 0xBBBB4444U;
GPIOG->CRL = 0x44BBBBBBU;
GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1->BTCR[4U] = 0x00001091U;
FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling\Inc\main.h | /**
******************************************************************************
* @file Examples_LL/GPIO/GPIO_InfiniteLedToggling/Inc/main.h
* @author MCD Application Team
* @brief Header for main.c module
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_ll_bus.h"
#include "stm32f1xx_ll_rcc.h"
#include "stm32f1xx_ll_system.h"
#include "stm32f1xx_ll_utils.h"
#include "stm32f1xx_ll_gpio.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/**
* @brief LED2
*/
#define LED2_PIN LL_GPIO_PIN_5
#define LED2_GPIO_PORT GPIOA
#define LED2_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA)
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
#endif /* __MAIN_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling\Inc\stm32f1xx_it.h | /**
******************************************************************************
* @file Examples_LL/GPIO/GPIO_InfiniteLedToggling/Inc/stm32f1xx_it.h
* @author MCD Application Team
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_IT_H
#define __STM32F1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F1xx_IT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling\Inc\stm32_assert.h | /**
******************************************************************************
* @file stm32_assert.h
* @author MCD Application Team
* @brief STM32 assert template file.
* This file should be copied to the application folder and renamed
* to stm32_assert.h.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_ASSERT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling\Src\main.c | /**
******************************************************************************
* @file Examples_LL/GPIO/GPIO_InfiniteLedToggling/Src/main.c
* @author MCD Application Team
* @brief This example describes how to configure and use GPIOs through
* the STM32F1xx GPIO LL API.
* Peripheral initialization done using LL unitary services functions.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup GPIO_InfiniteLedToggling
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void Configure_GPIO(void);
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/* Configure the system clock to 72 MHz */
SystemClock_Config();
/* -2- Configure IO in output push-pull mode to drive external LED */
Configure_GPIO();
/* Toggle IO in an infinite loop */
while (1)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
/* Insert delay 250 ms */
LL_mDelay(250);
}
}
/**
* @brief This function configures GPIO
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_GPIO(void)
{
/* Enable the LED2 Clock */
LED2_GPIO_CLK_ENABLE();
/* Configure IO in output push-pull mode to drive external LED2 */
LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
/* Reset value is LL_GPIO_OUTPUT_PUSHPULL */
//LL_GPIO_SetPinOutputType(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_OUTPUT_PUSHPULL);
/* Reset value is LL_GPIO_SPEED_FREQ_LOW */
//LL_GPIO_SetPinSpeed(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_SPEED_FREQ_LOW);
/* Reset value is LL_GPIO_PULL_NO */
//LL_GPIO_SetPinPull(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_PULL_NO);
}
/**
* @brief System Clock Configuration
* The system Clock is configured as follow :
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 72000000
* HCLK(Hz) = 72000000
* AHB Prescaler = 1
* APB1 Prescaler = 2
* APB2 Prescaler = 1
* HSE Frequency(Hz) = 8000000
* PLLMUL = 9
* Flash Latency(WS) = 2
* @param None
* @retval None
*/
void SystemClock_Config(void)
{
/* Set FLASH latency */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
/* Enable HSE oscillator */
LL_RCC_HSE_EnableBypass();
LL_RCC_HSE_Enable();
while(LL_RCC_HSE_IsReady() != 1)
{
};
/* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
LL_RCC_PLL_Enable();
while(LL_RCC_PLL_IsReady() != 1)
{
};
/* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
};
/* Set APB1 & APB2 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
/* Set systick to 1ms in using frequency set to 72MHz */
LL_Init1msTick(72000000);
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(72000000);
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling\Src\stm32f1xx_it.c | /**
******************************************************************************
* @file Examples_LL/GPIO/GPIO_InfiniteLedToggling/Src/stm32f1xx_it.c
* @author MCD Application Team
* @brief Main Interrupt Service Routines.
* This file provides template for all exceptions handler and
* peripherals interrupt service routine.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_it.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup GPIO_InfiniteLedToggling
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
/**
* @brief This function handles PendSVC exception.
* @param None
* @retval None
*/
void PendSV_Handler(void)
{
}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
void SysTick_Handler(void)
{
}
/******************************************************************************/
/* STM32F1xx Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (GPIO), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling\Src\system_stm32f1xx.c | /**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC->CFGR &= 0xF8FF0000U;
#else
RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull = ( pllmull >> 18U) + 2U;
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
#endif
}
#else
pllmull = pllmull >> 18U;
if (pllmull != 0x0DU)
{
pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
pllmull = 13U / 2U;
}
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
else
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
#endif /* STM32F105xC */
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
(void)(tmpreg);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD->CRL = 0x44BB44BBU;
GPIOD->CRH = 0xBBBBBBBBU;
GPIOE->CRL = 0xB44444BBU;
GPIOE->CRH = 0xBBBBBBBBU;
GPIOF->CRL = 0x44BBBBBBU;
GPIOF->CRH = 0xBBBB4444U;
GPIOG->CRL = 0x44BBBBBBU;
GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1->BTCR[4U] = 0x00001091U;
FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling_Init\Inc\main.h | /**
******************************************************************************
* @file Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/Inc/main.h
* @author MCD Application Team
* @brief Header for main.c module
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_ll_bus.h"
#include "stm32f1xx_ll_rcc.h"
#include "stm32f1xx_ll_system.h"
#include "stm32f1xx_ll_utils.h"
#include "stm32f1xx_ll_pwr.h"
#include "stm32f1xx_ll_gpio.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/**
* @brief LED2
*/
#define LED2_PIN LL_GPIO_PIN_5
#define LED2_GPIO_PORT GPIOA
#define LED2_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA)
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
#endif /* __MAIN_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling_Init\Inc\stm32f1xx_it.h | /**
******************************************************************************
* @file Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/Inc/stm32f1xx_it.h
* @author MCD Application Team
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_IT_H
#define __STM32F1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F1xx_IT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling_Init\Inc\stm32_assert.h | /**
******************************************************************************
* @file stm32_assert.h
* @author MCD Application Team
* @brief STM32 assert template file.
* This file should be copied to the application folder and renamed
* to stm32_assert.h.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_ASSERT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling_Init\Src\main.c | /**
******************************************************************************
* @file Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/Src/main.c
* @author MCD Application Team
* @brief This example describes how to configure and use GPIOs through
* the STM32F1xx GPIO LL API.
* Peripheral initialization done using LL initialization function.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup GPIO_InfiniteLedToggling_Init
* @{
*/
/* Private typedef -----------------------------------------------------------*/
LL_GPIO_InitTypeDef gpio_initstruct;
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void Configure_GPIO(void);
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/* Configure the system clock to 72 MHz */
SystemClock_Config();
/* -2- Configure IO in output push-pull mode to drive external LED */
Configure_GPIO();
/* Toggle IO in an infinite loop */
while (1)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
/* Insert delay 250 ms */
LL_mDelay(250);
}
}
/**
* @brief This function configures GPIO
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_GPIO(void)
{
/* Enable the LED2 Clock */
LED2_GPIO_CLK_ENABLE();
/* Configure IO in output push-pull mode to drive external LED2 */
gpio_initstruct.Pin = LED2_PIN;
gpio_initstruct.Mode = LL_GPIO_MODE_OUTPUT;
gpio_initstruct.Speed = LL_GPIO_SPEED_FREQ_LOW;
gpio_initstruct.OutputType = LL_GPIO_OUTPUT_PUSHPULL;
gpio_initstruct.Pull = LL_GPIO_PULL_DOWN;
/* Initialize LED2_GPIO_PORT port according to parameters defined in initialization structure. */
if (LL_GPIO_Init(LED2_GPIO_PORT, &gpio_initstruct) != SUCCESS)
{
/* Initialization Error */
while (1)
{
}
}
}
/**
* @brief System Clock Configuration
* The system Clock is configured as follow :
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 72000000
* HCLK(Hz) = 72000000
* AHB Prescaler = 1
* APB1 Prescaler = 2
* APB2 Prescaler = 1
* HSE Frequency(Hz) = 8000000
* PLLMUL = 9
* Flash Latency(WS) = 2
* @param None
* @retval None
*/
void SystemClock_Config(void)
{
/* Set FLASH latency */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
/* Enable HSE oscillator */
LL_RCC_HSE_EnableBypass();
LL_RCC_HSE_Enable();
while(LL_RCC_HSE_IsReady() != 1)
{
};
/* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
LL_RCC_PLL_Enable();
while(LL_RCC_PLL_IsReady() != 1)
{
};
/* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
};
/* Set APB1 & APB2 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
/* Set systick to 1ms in using frequency set to 72MHz */
LL_Init1msTick(72000000);
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(72000000);
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling_Init\Src\stm32f1xx_it.c | /**
******************************************************************************
* @file Examples_LL/GPIO/GPIO_InfiniteLedToggling_Init/Src/stm32f1xx_it.c
* @author MCD Application Team
* @brief Main Interrupt Service Routines.
* This file provides template for all exceptions handler and
* peripherals interrupt service routine.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_it.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup GPIO_InfiniteLedToggling_Init
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
/**
* @brief This function handles PendSVC exception.
* @param None
* @retval None
*/
void PendSV_Handler(void)
{
}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
void SysTick_Handler(void)
{
}
/******************************************************************************/
/* STM32F1xx Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (GPIO), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\GPIO\GPIO_InfiniteLedToggling_Init\Src\system_stm32f1xx.c | /**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC->CFGR &= 0xF8FF0000U;
#else
RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull = ( pllmull >> 18U) + 2U;
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
#endif
}
#else
pllmull = pllmull >> 18U;
if (pllmull != 0x0DU)
{
pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
pllmull = 13U / 2U;
}
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
else
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
#endif /* STM32F105xC */
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
(void)(tmpreg);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD->CRL = 0x44BB44BBU;
GPIOD->CRH = 0xBBBBBBBBU;
GPIOE->CRL = 0xB44444BBU;
GPIOE->CRH = 0xBBBBBBBBU;
GPIOF->CRL = 0x44BBBBBBU;
GPIOF->CRH = 0xBBBB4444U;
GPIOG->CRL = 0x44BBBBBBU;
GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1->BTCR[4U] = 0x00001091U;
FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_AdvCommunication_DMAAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_AdvCommunication_DMAAndIT\Inc\main.h | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT/Inc/main.h
* @author MCD Application Team
* @brief Header for main.c module
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/* Includes ------------------------------------------------------------------*/
#include "stdio.h"
#include "string.h"
#include "stm32f1xx_ll_bus.h"
#include "stm32f1xx_ll_rcc.h"
#include "stm32f1xx_ll_system.h"
#include "stm32f1xx_ll_utils.h"
#include "stm32f1xx_ll_cortex.h"
#include "stm32f1xx_ll_gpio.h"
#include "stm32f1xx_ll_exti.h"
#include "stm32f1xx_ll_dma.h"
#include "stm32f1xx_ll_i2c.h"
#include "stm32f1xx_ll_pwr.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Define used to enable time-out management*/
#define USE_TIMEOUT 0
/**
* @brief LED2
*/
#define LED2_PIN LL_GPIO_PIN_5
#define LED2_GPIO_PORT GPIOA
#define LED2_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA)
/**
* @brief Toggle periods for various blinking modes
*/
#define LED_BLINK_FAST 200
#define LED_BLINK_SLOW 500
#define LED_BLINK_ERROR 1000
/**
* @brief Key push-button
*/
#define USER_BUTTON_PIN LL_GPIO_PIN_13
#define USER_BUTTON_GPIO_PORT GPIOC
#define USER_BUTTON_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOC)
#define USER_BUTTON_EXTI_LINE LL_EXTI_LINE_13
#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
#define USER_BUTTON_EXTI_LINE_ENABLE() LL_EXTI_EnableIT_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_EXTI_FALLING_TRIG_ENABLE() LL_EXTI_EnableFallingTrig_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_SYSCFG_SET_EXTI() do { \
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO); \
LL_GPIO_AF_SetEXTISource(LL_GPIO_AF_EXTI_PORTC, LL_GPIO_AF_EXTI_LINE13); \
} while(0)
#define USER_BUTTON_IRQHANDLER EXTI15_10_IRQHandler
/**
* @brief Slave settings
*/
#define SLAVE_OWN_ADDRESS 0x5A /* This value is a left shift of a real 7 bits of a slave address
value which can find in a Datasheet as example: b0101101
mean in uint8_t equivalent at 0x2D and this value can be
seen in the OAR1 register in bits ADD[1:7] */
/**
* @brief Master Transfer Request Direction
*/
#define I2C_REQUEST_WRITE 0x00
#define I2C_REQUEST_READ 0x01
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
/* IRQ Handler treatment functions */
void UserButton_Callback(void);
void Slave_Ready_To_Transmit_Callback(void);
void Slave_Reception_Callback(void);
void Slave_Complete_Callback(void);
void Transfer_Complete_Callback(void);
void Transfer_Error_Callback(void);
void Error_Callback(void);
#endif /* __MAIN_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_AdvCommunication_DMAAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_AdvCommunication_DMAAndIT\Inc\stm32f1xx_it.h | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT/Inc/stm32f1xx_it.h
* @author MCD Application Team
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_IT_H
#define __STM32F1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void USER_BUTTON_IRQHANDLER(void);
void I2C1_EV_IRQHandler(void);
void I2C1_ER_IRQHandler(void);
void I2C2_EV_IRQHandler(void);
void I2C2_ER_IRQHandler(void);
void DMA1_Channel4_IRQHandler(void);
void DMA1_Channel5_IRQHandler(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F1xx_IT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_AdvCommunication_DMAAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_AdvCommunication_DMAAndIT\Inc\stm32_assert.h | /**
******************************************************************************
* @file stm32_assert.h
* @author MCD Application Team
* @brief STM32 assert template file.
* This file should be copied to the application folder and renamed
* to stm32_assert.h.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_ASSERT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_AdvCommunication_DMAAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_AdvCommunication_DMAAndIT\MDK-ARM\Retarget.c | /*----------------------------------------------------------------------------
* Name: Retarget.c
* Purpose: 'Retarget' layer for target-dependent low level functions
* Note(s):
*----------------------------------------------------------------------------
* This file is part of the uVision/ARM development tools.
* This software may only be used under the terms of a valid, current,
* end user licence from KEIL for a compatible version of KEIL software
* development tools. Nothing else gives you the right to use this software.
*
* This software is supplied "AS IS" without warranties of any kind.
*
* Copyright (c) 2011 Keil - An ARM Company. All rights reserved.
*----------------------------------------------------------------------------*/
#include <stdio.h>
#include <rt_misc.h>
#include "Serial.h"
#pragma import(__use_no_semihosting_swi)
struct __FILE { int handle; /* Add whatever you need here */ };
FILE __stdout;
FILE __stdin;
int fputc(int c, FILE *f) {
return (SER_PutChar(c));
}
int fgetc(FILE *f) {
return (SER_GetChar());
}
int ferror(FILE *f) {
/* Your implementation of ferror */
return EOF;
}
void _ttywrch(int c) {
SER_PutChar(c);
}
void _sys_exit(int return_code) {
label: goto label; /* endless loop */
}
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_AdvCommunication_DMAAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_AdvCommunication_DMAAndIT\MDK-ARM\Serial.c | /*----------------------------------------------------------------------------
* Name: Serial.c
* Purpose: Low Level Serial Routines
* Note(s): possible defines select the used communication interface:
* __DBG_ITM - ITM SWO interface
*----------------------------------------------------------------------------
* This file is part of the uVision/ARM development tools.
* This software may only be used under the terms of a valid, current,
* end user licence from KEIL for a compatible version of KEIL software
* development tools. Nothing else gives you the right to use this software.
*
* This software is supplied "AS IS" without warranties of any kind.
*
* Copyright (c) 2008-2011 Keil - An ARM Company. All rights reserved.
*----------------------------------------------------------------------------*/
#include <stm32f1xx.h> /* STM32l4xx Definitions */
#include "Serial.h"
#ifdef __DBG_ITM
volatile int ITM_RxBuffer = ITM_RXBUFFER_EMPTY; /* CMSIS Debug Input */
#endif
/*----------------------------------------------------------------------------
Write character to Serial Port
*----------------------------------------------------------------------------*/
int SER_PutChar (int c) {
ITM_SendChar(c);
return (c);
}
/*----------------------------------------------------------------------------
Read character from Serial Port (blocking read)
*----------------------------------------------------------------------------*/
int SER_GetChar (void) {
while (ITM_CheckChar() != 1) __NOP();
return (ITM_ReceiveChar());
}
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_AdvCommunication_DMAAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_AdvCommunication_DMAAndIT\MDK-ARM\Serial.h | /*----------------------------------------------------------------------------
* Name: Serial.h
* Purpose: Low level serial definitions
* Note(s):
*----------------------------------------------------------------------------
* This file is part of the uVision/ARM development tools.
* This software may only be used under the terms of a valid, current,
* end user licence from KEIL for a compatible version of KEIL software
* development tools. Nothing else gives you the right to use this software.
*
* This software is supplied "AS IS" without warranties of any kind.
*
* Copyright (c) 2010 Keil - An ARM Company. All rights reserved.
*----------------------------------------------------------------------------*/
#ifndef __SERIAL_H
#define __SERIAL_H
#include <stdio.h>
extern void SER_Init (void);
extern int SER_GetChar (void);
extern int SER_PutChar (int c);
#endif
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_AdvCommunication_DMAAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_AdvCommunication_DMAAndIT\Src\main.c | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT/Src/main.c
* @author MCD Application Team
* @brief This example describes how to send/receive bytes over I2C IP using
* the STM32F1xx I2C LL API.
* Peripheral initialization done using LL unitary services functions.
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#if defined(__GNUC__)
#include <stdio.h> /*rtt*/
#include <stdlib.h> /*rtt*/
#endif
#include "main.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup I2C_OneBoard_AdvCommunication_DMAAndIT
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/**
* @brief Timeout value
*/
#if (USE_TIMEOUT == 1)
#define DMA_SEND_TIMEOUT_TC_MS 5
#define I2C_SEND_TIMEOUT_TC_MS 2
#define I2C_SEND_TIMEOUT_STOP_MS 5
#endif /* USE_TIMEOUT */
/**
* @brief I2C devices settings
*/
/* I2C SPEEDCLOCK define to max value: 400 KHz */
#define I2C_SPEEDCLOCK 400000
#define I2C_DUTYCYCLE LL_I2C_DUTYCYCLE_2
#define SLAVE_CHIP_NAME 0
#define SLAVE_CHIP_REVISION 1
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
#if (USE_TIMEOUT == 1)
uint32_t Timeout = 0; /* Variable used for Timeout management */
#endif /* USE_TIMEOUT */
__IO uint8_t ubButtonPress = 0;
/**
* @brief Variables related to Master process
*/
/* aCommandCode declaration array */
/* [CommandCode][RequestSlaveAnswer] */
/* {CODE, YES/NO} */
const char* aCommandCode[4][4] = {
{"CHIP NAME", "YES"},
{"CHIP REVISION", "YES"},
{"LOW POWER", "NO"},
{"WAKE UP", "NO"}
};
__IO uint8_t ubMasterXferDirection = 0;
__IO uint8_t ubMasterRequestDirection = 0;
uint32_t* pMasterTransmitBuffer = (uint32_t*)(&aCommandCode[0][0]);
uint8_t ubMasterNbCommandCode = sizeof(aCommandCode[0][0]);
uint8_t aMasterReceiveBuffer[0xF] = {0};
__IO uint8_t ubMasterNbDataToReceive = sizeof(aMasterReceiveBuffer);
__IO uint8_t ubMasterNbDataToTransmit = 0;
uint8_t ubMasterCommandIndex = 0;
__IO uint8_t ubMasterReceiveIndex = 0;
__IO uint8_t ubMasterTransferComplete = 0;
/**
* @brief Variables related to Slave process
*/
const char* aSlaveInfo[] = {
"STM32F103RBT6",
"1.2.3"};
uint8_t aSlaveReceiveBuffer[0xF] = {0};
uint8_t* pSlaveTransmitBuffer = 0;
__IO uint8_t ubSlaveNbDataToTransmit = 0;
uint8_t ubSlaveInfoIndex = 0xFF;
__IO uint8_t ubSlaveReceiveIndex = 0;
__IO uint8_t ubSlaveReceiveComplete = 0;
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void Configure_DMA(void);
void Configure_I2C_Slave(void);
void Configure_I2C_Master(void);
void Activate_I2C_Slave(void);
void Activate_I2C_Master(void);
uint8_t Buffercmp8(uint8_t* pBuffer1, uint8_t* pBuffer2, uint8_t BufferLength);
void FlushBuffer8(uint8_t* pBuffer1);
void LED_Init(void);
void LED_On(void);
void LED_Off(void);
void LED_Blinking(uint32_t Period);
void WaitForUserButtonPress(void);
void Handle_I2C_Slave(void);
void Handle_I2C_Master_Transmit(void);
void Handle_I2C_Master_TransmitReceive(void);
void UserButton_Init(void);
#if defined(__GNUC__)
extern void initialise_monitor_handles(void); /*rtt*/
#endif
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
#if defined(__GNUC__)
initialise_monitor_handles(); /*rtt*/
#endif
/* Configure the system clock to 72 MHz */
SystemClock_Config();
/* Initialize LED2 */
LED_Init();
/* Set LED2 Off */
LED_Off();
/* Initialize User push-button in EXTI mode */
UserButton_Init();
/* Configure DMA1_Channel4 (DMA IP configuration in transfer memory to peripheral (I2C2) */
Configure_DMA();
/* Configure I2C1 (I2C IP configuration in Slave mode and related GPIO initialization) */
Configure_I2C_Slave();
/* Configure I2C2 (I2C IP configuration in Master mode and related GPIO initialization) */
Configure_I2C_Master();
/* Enable the I2C1 peripheral (Slave) */
Activate_I2C_Slave();
/* Enable the I2C2 peripheral (Master) */
Activate_I2C_Master();
/* Infinite loop */
while (1)
{
/* Wait for User push-button press to start transfer */
WaitForUserButtonPress();
/* Handle I2C1 events (Slave) */
Handle_I2C_Slave();
/* Clear User push-button related variable */
ubButtonPress = 0;
if(strncmp(aCommandCode[ubMasterCommandIndex][1], "NO", 2) == 0)
{
/* Handle I2C2 events (Master Transmit only) */
Handle_I2C_Master_Transmit();
}
else
{
/* Handle I2C2 events (Master Transmit then Receive) */
Handle_I2C_Master_TransmitReceive();
}
/* Prepare Index to send next command code */
ubMasterCommandIndex++;
if(ubMasterCommandIndex >= ubMasterNbCommandCode)
{
ubMasterCommandIndex = 0;
}
}
}
/**
* @brief This function configures the DMA Channels for I2C2(TXDR) and I2C2(RXDR).
* @note This function is used to :
* -1- Enable the clock of DMA1.
* -2- Configure NVIC for DMA1_Channel4 and DMA1_Channel5.
* -3- Configure the DMA functional parameters for Master Transmit.
* -4- Configure the DMA functional parameters for Master Receive.
* -5- Enable DMA1 interrupts complete/error.
* @param None
* @retval None
*/
void Configure_DMA(void)
{
/* (1) Enable the clock of DMA1 */
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1);
/* (2) Configure NVIC for DMA1_Channel4 and DMA1_Channel5 */
NVIC_SetPriority(DMA1_Channel4_IRQn, 0x4);
NVIC_EnableIRQ(DMA1_Channel4_IRQn);
NVIC_SetPriority(DMA1_Channel5_IRQn, 0x1);
NVIC_EnableIRQ(DMA1_Channel5_IRQn);
/* (3) Configure the DMA functional parameters for Master Transmit */
LL_DMA_ConfigTransfer(DMA1, LL_DMA_CHANNEL_4, LL_DMA_DIRECTION_MEMORY_TO_PERIPH | \
LL_DMA_PRIORITY_HIGH | \
LL_DMA_MODE_NORMAL | \
LL_DMA_PERIPH_NOINCREMENT | \
LL_DMA_MEMORY_INCREMENT | \
LL_DMA_PDATAALIGN_BYTE | \
LL_DMA_MDATAALIGN_BYTE);
LL_DMA_ConfigAddresses(DMA1, LL_DMA_CHANNEL_4, (uint32_t)(*pMasterTransmitBuffer), (uint32_t)LL_I2C_DMA_GetRegAddr(I2C2), LL_DMA_GetDataTransferDirection(DMA1, LL_DMA_CHANNEL_4));
/* (4) Configure the DMA functional parameters for Master Receive */
LL_DMA_ConfigTransfer(DMA1, LL_DMA_CHANNEL_5, LL_DMA_DIRECTION_PERIPH_TO_MEMORY | \
LL_DMA_PRIORITY_HIGH | \
LL_DMA_MODE_NORMAL | \
LL_DMA_PERIPH_NOINCREMENT | \
LL_DMA_MEMORY_INCREMENT | \
LL_DMA_PDATAALIGN_BYTE | \
LL_DMA_MDATAALIGN_BYTE);
LL_DMA_ConfigAddresses(DMA1, LL_DMA_CHANNEL_5, (uint32_t)LL_I2C_DMA_GetRegAddr(I2C2), (uint32_t)&(aMasterReceiveBuffer), LL_DMA_GetDataTransferDirection(DMA1, LL_DMA_CHANNEL_5));
/* (5) Enable DMA1 interrupts complete/error */
LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_4);
LL_DMA_EnableIT_TE(DMA1, LL_DMA_CHANNEL_4);
LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_5);
LL_DMA_EnableIT_TE(DMA1, LL_DMA_CHANNEL_5);
}
/**
* @brief This function configures I2C1 in Slave mode.
* @note This function is used to :
* -1- Enables GPIO clock.
* -2- Enable the I2C1 peripheral clock and configures the I2C1 pins.
* -3- Configure NVIC for I2C1.
* -4- Configure I2C1 functional parameters.
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_I2C_Slave(void)
{
/* (1) Enables GPIO clock */
/* Enable the peripheral clock of GPIOB */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
/* (2) Enable the I2C1 peripheral clock *************************************/
/* Enable the peripheral clock for I2C1 */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1);
/* Configure SCL Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_6, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_6, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_6, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_6, LL_GPIO_PULL_UP);
/* Configure SDA Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_7, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_7, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_7, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_7, LL_GPIO_PULL_UP);
/* (3) Configure NVIC for I2C1 **********************************************/
/* Configure Event IT:
* - Set priority for I2C1_EV_IRQn
* - Enable I2C1_EV_IRQn
*/
NVIC_SetPriority(I2C1_EV_IRQn, 0xF);
NVIC_EnableIRQ(I2C1_EV_IRQn);
/* Configure Error IT:
* - Set priority for I2C1_ER_IRQn
* - Enable I2C1_ER_IRQn
*/
NVIC_SetPriority(I2C1_ER_IRQn, 0xF);
NVIC_EnableIRQ(I2C1_ER_IRQn);
/* (4) Configure I2C1 functional parameters ***********************/
/* Disable I2C1 prior modifying configuration registers */
LL_I2C_Disable(I2C1);
/* Configure the Own Address1 :
* - OwnAddress1 is SLAVE_OWN_ADDRESS
* - OwnAddrSize is LL_I2C_OWNADDRESS1_7BIT
*/
LL_I2C_SetOwnAddress1(I2C1, SLAVE_OWN_ADDRESS, LL_I2C_OWNADDRESS1_7BIT);
/* Enable Clock stretching */
/* Reset Value is Clock stretching enabled */
//LL_I2C_EnableClockStretching(I2C1);
/* Enable General Call */
/* Reset Value is General Call disabled */
//LL_I2C_EnableGeneralCall(I2C1);
/* Configure the 7bits Own Address2 */
/* Reset Values of :
* - OwnAddress2 is 0x00
* - Own Address2 is disabled
*/
//LL_I2C_SetOwnAddress2(I2C1, 0x00);
//LL_I2C_DisableOwnAddress2(I2C1);
/* Enable Peripheral in I2C mode */
/* Reset Value is I2C mode */
//LL_I2C_SetMode(I2C1, LL_I2C_MODE_I2C);
}
/**
* @brief This function configures I2C2 in Master mode.
* @note This function is used to :
* -1- Enables GPIO clock.
* -2- Enable the I2C2 peripheral clock and configures the I2C2 pins.
* -3- Configure NVIC for I2C2.
* -4- Configure I2C2 functional parameters.
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_I2C_Master(void)
{
LL_RCC_ClocksTypeDef rcc_clocks;
/* (1) Enables GPIO clock **********************/
/* Enable the peripheral clock of GPIOB */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
/* (2) Enable the I2C2 peripheral clock *************************************/
/* Enable the peripheral clock for I2C2 */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C2);
/* Configure SCL Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_10, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_10, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_10, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_10, LL_GPIO_PULL_UP);
/* Configure SDA Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_11, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_11, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_11, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_11, LL_GPIO_PULL_UP);
/* (3) Configure NVIC for I2C2 **********************************************/
/* Configure Event IT:
* - Set priority for I2C2_EV_IRQn
* - Enable I2C2_EV_IRQn
*/
NVIC_SetPriority(I2C2_EV_IRQn, 0);
NVIC_EnableIRQ(I2C2_EV_IRQn);
/* Configure Error IT:
* - Set priority for I2C2_ER_IRQn
* - Enable I2C2_ER_IRQn
*/
NVIC_SetPriority(I2C2_ER_IRQn, 0);
NVIC_EnableIRQ(I2C2_ER_IRQn);
/* (4) Configure I2C2 functional parameters ********************************/
/* Disable I2C2 prior modifying configuration registers */
LL_I2C_Disable(I2C2);
/* Retrieve Clock frequencies */
LL_RCC_GetSystemClocksFreq(&rcc_clocks);
/* Configure the SCL Clock Speed */
LL_I2C_ConfigSpeed(I2C2, rcc_clocks.PCLK1_Frequency, I2C_SPEEDCLOCK, I2C_DUTYCYCLE);
/* Configure the Own Address1 */
/* Reset Values of :
* - OwnAddress1 is 0x00
* - OwnAddrSize is LL_I2C_OWNADDRESS1_7BIT
*/
//LL_I2C_SetOwnAddress1(I2C2, 0x00, LL_I2C_OWNADDRESS1_7BIT);
/* Enable Clock stretching */
/* Reset Value is Clock stretching enabled */
//LL_I2C_EnableClockStretching(I2C2);
/* Enable General Call */
/* Reset Value is General Call disabled */
//LL_I2C_EnableGeneralCall(I2C2);
/* Configure the 7bits Own Address2 */
/* Reset Values of :
* - OwnAddress2 is 0x00
* - Own Address2 is disabled
*/
//LL_I2C_SetOwnAddress2(I2C2, 0x00);
//LL_I2C_DisableOwnAddress2(I2C2);
/* Enable Peripheral in I2C mode */
/* Reset Value is I2C mode */
//LL_I2C_SetMode(I2C2, LL_I2C_MODE_I2C);
}
/**
* @brief This function Activate I2C1 peripheral (Slave)
* @note This function is used to :
* -1- Enable I2C1.
* -2- Enable I2C1 transfer event/error interrupts.
* @param None
* @retval None
*/
void Activate_I2C_Slave(void)
{
/* (1) Enable I2C1 **********************************************************/
LL_I2C_Enable(I2C1);
/* (2) Enable I2C1 transfer event/error interrupts:
* - Enable Event interrupts
* - Enable Error interrupts
*/
LL_I2C_EnableIT_EVT(I2C1);
LL_I2C_EnableIT_ERR(I2C1);
}
/**
* @brief This function Activate I2C2 peripheral (Master)
* @note This function is used to :
* -1- Enable I2C2.
* -2- Enable I2C2 transfer event/error interrupts.
* @param None
* @retval None
*/
void Activate_I2C_Master(void)
{
/* (1) Enable I2C2 **********************************************************/
LL_I2C_Enable(I2C2);
/* (2) Enable I2C2 transfer event/error interrupts:
* - Enable Event interrupts
* - Enable Error interrupts
*/
LL_I2C_EnableIT_EVT(I2C2);
LL_I2C_EnableIT_ERR(I2C2);
}
/**
* @brief Flush 8-bit buffer.
* @param pBuffer1: pointer to the buffer to be flushed.
* @retval None
*/
void FlushBuffer8(uint8_t* pBuffer1)
{
uint8_t Index = 0;
for (Index = 0; Index < sizeof(pBuffer1); Index++)
{
pBuffer1[Index] = 0;
}
}
/**
* @brief Compares two 8-bit buffers and returns the comparison result.
* @param pBuffer1: pointer to the source buffer to be compared to.
* @param pBuffer2: pointer to the second source buffer to be compared to the first.
* @param BufferLength: buffer's length.
* @retval 0: Comparison is OK (the two Buffers are identical)
* Value different from 0: Comparison is NOK (Buffers are different)
*/
uint8_t Buffercmp8(uint8_t* pBuffer1, uint8_t* pBuffer2, uint8_t BufferLength)
{
while (BufferLength--)
{
if (*pBuffer1 != *pBuffer2)
{
return 1;
}
pBuffer1++;
pBuffer2++;
}
return 0;
}
/**
* @brief Initialize LED2.
* @param None
* @retval None
*/
void LED_Init(void)
{
/* Enable the LED2 Clock */
LED2_GPIO_CLK_ENABLE();
/* Configure IO in output push-pull mode to drive external LED2 */
LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
/* Reset value is LL_GPIO_OUTPUT_PUSHPULL */
//LL_GPIO_SetPinOutputType(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_OUTPUT_PUSHPULL);
/* Reset value is LL_GPIO_SPEED_FREQ_LOW */
//LL_GPIO_SetPinSpeed(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_SPEED_FREQ_LOW);
/* Reset value is LL_GPIO_PULL_NO */
//LL_GPIO_SetPinPull(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_PULL_NO);
}
/**
* @brief Turn-on LED2.
* @param None
* @retval None
*/
void LED_On(void)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Turn-off LED2.
* @param None
* @retval None
*/
void LED_Off(void)
{
/* Turn LED2 off */
LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Set LED2 to Blinking mode for an infinite loop (toggle period based on value provided as input parameter).
* @param Period : Period of time (in ms) between each toggling of LED
* This parameter can be user defined values. Pre-defined values used in that example are :
* @arg LED_BLINK_FAST : Fast Blinking
* @arg LED_BLINK_SLOW : Slow Blinking
* @arg LED_BLINK_ERROR : Error specific Blinking
* @retval None
*/
void LED_Blinking(uint32_t Period)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
/* Toggle IO in an infinite loop */
while (1)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(Period);
}
}
/**
* @brief Configures User push-button in GPIO or EXTI Line Mode.
* @param None
* @retval None
*/
void UserButton_Init(void)
{
/* Enable the BUTTON Clock */
USER_BUTTON_GPIO_CLK_ENABLE();
/* Configure GPIO for BUTTON */
LL_GPIO_SetPinMode(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_MODE_INPUT);
/* Connect External Line to the GPIO*/
USER_BUTTON_SYSCFG_SET_EXTI();
/* Enable a rising trigger External line 13 Interrupt */
USER_BUTTON_EXTI_LINE_ENABLE();
USER_BUTTON_EXTI_FALLING_TRIG_ENABLE();
/* Configure NVIC for USER_BUTTON_EXTI_IRQn */
NVIC_EnableIRQ(USER_BUTTON_EXTI_IRQn);
NVIC_SetPriority(USER_BUTTON_EXTI_IRQn, 0x03);
}
/**
* @brief Wait for User push-button press to start transfer.
* @param None
* @retval None
*/
/* */
void WaitForUserButtonPress(void)
{
while (ubButtonPress == 0)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(LED_BLINK_FAST);
}
/* Turn LED2 off */
LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief This Function handle Slave events to perform a transmission process
* @note This function is composed in one step :
* -1- Prepare acknowledge for Slave address reception.
* @param None
* @retval None
*/
void Handle_I2C_Slave(void)
{
/* (1) Prepare acknowledge for Slave address reception **********************/
LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_ACK);
}
/**
* @brief This Function handle Master events to perform a transmission process
* @note This function is composed in different steps :
* -1- Configure DMA parameters for Command Code transfer.
* -2- Enable DMA transfer.
* -3- Prepare acknowledge for Master data reception.
* -4- Initiate a Start condition to the Slave device.
* -5- Loop until end of transfer completed (DMA TC raised).
* -6- Generate a Stop condition to the Slave device.
* -7- Clear pending flags, Data Command Code are checking into Slave process.
* @param None
* @retval None
*/
void Handle_I2C_Master_Transmit(void)
{
/* (1) Configure DMA parameters for Command Code transfer *******************/
pMasterTransmitBuffer = (uint32_t*)(&aCommandCode[ubMasterCommandIndex][0]);
ubMasterNbDataToTransmit = strlen((char *)pMasterTransmitBuffer[0]);
LL_DMA_SetMemoryAddress(DMA1, LL_DMA_CHANNEL_4, (uint32_t)(*pMasterTransmitBuffer));
LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_4, ubMasterNbDataToTransmit);
/* (2) Enable DMA transfer **************************************************/
LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_4);
/* (3) Prepare acknowledge for Master data reception ************************/
LL_I2C_AcknowledgeNextData(I2C2, LL_I2C_ACK);
/* (4) Initiate a Start condition to the Slave device ***********************/
/* Master Request direction WRITE */
ubMasterRequestDirection = I2C_REQUEST_WRITE;
/* Master Generate Start condition */
LL_I2C_GenerateStartCondition(I2C2);
/* (5) Loop until end of transfer completed (DMA TC raised) *****************/
#if (USE_TIMEOUT == 1)
Timeout = DMA_SEND_TIMEOUT_TC_MS;
#endif /* USE_TIMEOUT */
/* Loop until DMA transfer complete event */
while(!ubMasterTransferComplete)
{
#if (USE_TIMEOUT == 1)
/* Check Systick counter flag to decrement the time-out value */
if (LL_SYSTICK_IsActiveCounterFlag())
{
if(Timeout-- == 0)
{
/* Time-out occurred. Set LED to blinking mode */
LED_Blinking(LED_BLINK_SLOW);
}
}
#endif /* USE_TIMEOUT */
}
/* (6) Generate a Stop condition to the Slave device ************************/
LL_I2C_GenerateStopCondition(I2C2);
/* (7) Clear pending flags, Data Command Code are checking into Slave process */
/* End of Master Process */
LL_DMA_DisableChannel(DMA1, LL_DMA_CHANNEL_4);
/* Display through external Terminal IO the Slave Answer received */
printf("%s : %s\n\r", (char*)(aCommandCode[ubMasterCommandIndex][0]), (char*)aMasterReceiveBuffer);
/* Turn LED2 On */
/* Master sequence completed successfully*/
LED_On();
/* Keep LED2 On, 500 MilliSeconds */
LL_mDelay(500);
LED_Off();
/* Clear and Reset process variables and arrays */
ubMasterTransferComplete = 0;
ubMasterNbDataToTransmit = 0;
ubMasterReceiveIndex = 0;
FlushBuffer8(aMasterReceiveBuffer);
}
/**
* @brief This Function handle Master events to perform a transmission then a reception process
* @note This function is composed in different steps :
* -1- Configure DMA parameters for Command Code transfer.
* -2- Enable DMA transfer.
* -3- Prepare acknowledge for Master data reception.
* -4- Initiate a Start condition to the Slave device.
* -5- Loop until end of transfer completed (DMA TC raised).
* -6- Prepare acknowledge for Master data reception.
* -7- Initiate a ReStart condition to the Slave device.
* -8- Loop until end of transfer completed (DMA TC raised).
* -9- Generate a Stop condition to the Slave device.
* -10- Clear pending flags, Data Command Code are checking into Slave process.
* @param None
* @retval None
*/
void Handle_I2C_Master_TransmitReceive(void)
{
/* (1) Configure DMA parameters for Command Code transfer *******************/
pMasterTransmitBuffer = (uint32_t*)(&aCommandCode[ubMasterCommandIndex][0]);
ubMasterNbDataToTransmit = strlen((char *)pMasterTransmitBuffer[0]);
LL_DMA_SetMemoryAddress(DMA1, LL_DMA_CHANNEL_4, (uint32_t)(*pMasterTransmitBuffer));
LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_4, ubMasterNbDataToTransmit);
/* (2) Enable DMA transfer **************************************************/
LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_4);
/* (3) Prepare acknowledge for Master data reception ************************/
LL_I2C_AcknowledgeNextData(I2C2, LL_I2C_ACK);
/* (4) Initiate a Start condition to the Slave device ***********************/
/* Master Request direction WRITE */
ubMasterRequestDirection = I2C_REQUEST_WRITE;
/* Master Generate Start condition */
LL_I2C_GenerateStartCondition(I2C2);
/* (5) Loop until end of transfer completed (DMA TC raised) *****************/
#if (USE_TIMEOUT == 1)
Timeout = DMA_SEND_TIMEOUT_TC_MS;
#endif /* USE_TIMEOUT */
/* Loop until DMA transfer complete event */
while(!ubMasterTransferComplete)
{
#if (USE_TIMEOUT == 1)
/* Check Systick counter flag to decrement the time-out value */
if (LL_SYSTICK_IsActiveCounterFlag())
{
if(Timeout-- == 0)
{
/* Time-out occurred. Set LED to blinking mode */
LED_Blinking(LED_BLINK_SLOW);
}
}
#endif /* USE_TIMEOUT */
}
/* Reset ubMasterTransferComplete flag */
ubMasterTransferComplete = 0;
/* (6) Configure DMA to receive data from slave *****************************/
LL_DMA_DisableChannel(DMA1, LL_DMA_CHANNEL_4);
LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_5, ubMasterNbDataToReceive);
LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_5);
/* (6) Prepare acknowledge for Master data reception ************************/
LL_I2C_AcknowledgeNextData(I2C2, LL_I2C_ACK);
/* (7) Initiate a ReStart condition to the Slave device *********************/
/* Master Request direction READ */
ubMasterRequestDirection = I2C_REQUEST_READ;
/* Master Generate ReStart condition */
LL_I2C_GenerateStartCondition(I2C2);
/* (8) Loop until end of transfer completed (DMA TC raised) *****************/
#if (USE_TIMEOUT == 1)
Timeout = DMA_SEND_TIMEOUT_TC_MS;
#endif /* USE_TIMEOUT */
/* Loop until DMA transfer complete event */
while(!ubMasterTransferComplete)
{
#if (USE_TIMEOUT == 1)
/* Check Systick counter flag to decrement the time-out value */
if (LL_SYSTICK_IsActiveCounterFlag())
{
if(Timeout-- == 0)
{
/* Time-out occurred. Set LED to blinking mode */
LED_Blinking(LED_BLINK_SLOW);
}
}
#endif /* USE_TIMEOUT */
}
/* (9) Generate a Stop condition to the Slave device ************************/
LL_I2C_GenerateStopCondition(I2C2);
/* (10) Clear pending flags, Data Command Code are checking into Slave process */
/* Disable Last DMA bit */
LL_I2C_DisableLastDMA(I2C2);
/* Disable acknowledge for Master next data reception */
LL_I2C_AcknowledgeNextData(I2C2, LL_I2C_NACK);
/* End of Master Process */
LL_DMA_DisableChannel(DMA1, LL_DMA_CHANNEL_5);
/* Display through external Terminal IO the Slave Answer received */
printf("%s : %s\n\r", (char*)(aCommandCode[ubMasterCommandIndex][0]), (char*)aMasterReceiveBuffer);
/* Turn LED2 On */
/* Master sequence completed successfully*/
LED_On();
/* Keep LED2 On, 500 MilliSeconds */
LL_mDelay(500);
LED_Off();
/* Clear and Reset process variables and arrays */
ubMasterTransferComplete = 0;
ubMasterNbDataToTransmit = 0;
ubMasterReceiveIndex = 0;
FlushBuffer8(aMasterReceiveBuffer);
}
/**
* @brief System Clock Configuration
* The system Clock is configured as follow :
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 72000000
* HCLK(Hz) = 72000000
* AHB Prescaler = 1
* APB1 Prescaler = 2
* APB2 Prescaler = 1
* HSE Frequency(Hz) = 8000000
* PLLMUL = 9
* Flash Latency(WS) = 2
* @param None
* @retval None
*/
void SystemClock_Config(void)
{
/* Set FLASH latency */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
/* Enable HSE oscillator */
LL_RCC_HSE_EnableBypass();
LL_RCC_HSE_Enable();
while(LL_RCC_HSE_IsReady() != 1)
{
};
/* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
LL_RCC_PLL_Enable();
while(LL_RCC_PLL_IsReady() != 1)
{
};
/* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
};
/* Set APB1 & APB2 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
/* Set systick to 1ms in using frequency set to 72MHz */
LL_Init1msTick(72000000);
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(72000000);
}/******************************************************************************/
/* IRQ HANDLER TREATMENT Functions */
/******************************************************************************/
/**
* @brief Function to manage User push-button
* @param None
* @retval None
*/
void UserButton_Callback(void)
{
/* Update User push-button variable : to be checked in waiting loop in main program */
ubButtonPress = 1;
}
/**
* @brief Function called from I2C IRQ Handler when TXE flag is set
* Function is in charge of transmit a byte on I2C lines.
* @param None
* @retval None
*/
void Slave_Ready_To_Transmit_Callback(void)
{
if(ubSlaveNbDataToTransmit > 0)
{
/* Send the Byte requested by the Master */
LL_I2C_TransmitData8(I2C1, (uint8_t)(*pSlaveTransmitBuffer++));
ubSlaveNbDataToTransmit--;
}
else
{
/* Send the NULL Byte until Master stop the communication */
/* This is needed due to Master don't know how many data slave will sent */
LL_I2C_TransmitData8(I2C1, 0x00);
}
}
/**
* @brief Function called from I2C IRQ Handler when RXNE flag is set
* Function is in charge of retrieving received byte on I2C lines.
* @param None
* @retval None
*/
void Slave_Reception_Callback(void)
{
/* Read character in Receive Data register.
RXNE flag is cleared by reading data in RXDR register */
aSlaveReceiveBuffer[ubSlaveReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
/* Check Command code */
if(Buffercmp8((uint8_t*)aSlaveReceiveBuffer, (uint8_t*)(aCommandCode[0][0]), (ubSlaveReceiveIndex-1)) == 0)
{
ubSlaveInfoIndex = SLAVE_CHIP_NAME;
ubSlaveNbDataToTransmit = strlen(aSlaveInfo[ubSlaveInfoIndex]);
pSlaveTransmitBuffer = (uint8_t*)(aSlaveInfo[ubSlaveInfoIndex]);
}
else if(Buffercmp8((uint8_t*)aSlaveReceiveBuffer, (uint8_t*)(aCommandCode[1][0]), (ubSlaveReceiveIndex-1)) == 0)
{
ubSlaveInfoIndex = SLAVE_CHIP_REVISION;
ubSlaveNbDataToTransmit = strlen(aSlaveInfo[ubSlaveInfoIndex]);
pSlaveTransmitBuffer = (uint8_t*)(aSlaveInfo[ubSlaveInfoIndex]);
}
}
/**
* @brief Function called from I2C IRQ Handler when STOP flag is set
* Function is in charge of checking data received,
* LED2 is On if data are correct.
* @param None
* @retval None
*/
void Slave_Complete_Callback(void)
{
/* Clear and Reset process variables and arrays */
ubSlaveReceiveIndex = 0;
ubSlaveReceiveComplete = 0;
FlushBuffer8(aSlaveReceiveBuffer);
}
/**
* @brief DMA transfer complete callback
* @note This function is executed when the transfer complete interrupt
* is generated
* @retval None
*/
void Transfer_Complete_Callback()
{
/* DMA transfer completed */
ubMasterTransferComplete = 1;
}
/**
* @brief DMA transfer error callback
* @note This function is executed when the transfer error interrupt
* is generated during DMA transfer
* @retval None
*/
void Transfer_Error_Callback()
{
/* Disable DMA1_Channel4_IRQn */
NVIC_DisableIRQ(DMA1_Channel4_IRQn);
/* Error detected during DMA transfer */
LED_Blinking(LED_BLINK_ERROR);
}
/**
* @brief Function called in case of error detected in I2C IT Handler
* @param None
* @retval None
*/
void Error_Callback(void)
{
/* Disable I2C1_EV_IRQn */
NVIC_DisableIRQ(I2C1_EV_IRQn);
/* Disable I2C1_ER_IRQn */
NVIC_DisableIRQ(I2C1_ER_IRQn);
/* Unexpected event : Set LED2 to Blinking mode to indicate error occurs */
LED_Blinking(LED_BLINK_ERROR);
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_AdvCommunication_DMAAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_AdvCommunication_DMAAndIT\Src\stm32f1xx_it.c | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_AdvCommunication_DMAAndIT/Src/stm32f1xx_it.c
* @author MCD Application Team
* @brief Main Interrupt Service Routines.
* This file provides template for all exceptions handler and
* peripherals interrupt service routine.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_it.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup I2C_OneBoard_AdvCommunication_DMAAndIT
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
extern __IO uint8_t ubMasterRequestDirection;
extern __IO uint8_t ubMasterXferDirection;
extern __IO uint8_t ubMasterNbDataToReceive;
extern __IO uint8_t ubSlaveNbDataToTransmit;
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
/**
* @brief This function handles PendSVC exception.
* @param None
* @retval None
*/
void PendSV_Handler(void)
{
}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
void SysTick_Handler(void)
{
}
/******************************************************************************/
/* STM32F1xx Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @brief This function handles external lines 10 to 15 interrupt request.
* @param None
* @retval None
*/
void USER_BUTTON_IRQHANDLER(void)
{
/* Manage Flags */
if(LL_EXTI_IsActiveFlag_0_31(USER_BUTTON_EXTI_LINE) != RESET)
{
LL_EXTI_ClearFlag_0_31(USER_BUTTON_EXTI_LINE);
/* Manage code in main.c.*/
UserButton_Callback();
}
}
/**
* Brief This function handles I2C1 (Slave) event interrupt request.
* Param None
* Retval None
*/
void I2C1_EV_IRQHandler(void)
{
/* Check ADDR flag value in ISR register */
if(LL_I2C_IsActiveFlag_ADDR(I2C1))
{
/* Verify the slave transfer direction, a read direction, Slave enters receiver mode */
if(LL_I2C_GetTransferDirection(I2C1) == LL_I2C_DIRECTION_READ)
{
/* Enable Buffer Interrupts */
LL_I2C_EnableIT_BUF(I2C1);
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C1);
}
else if(LL_I2C_GetTransferDirection(I2C1) == LL_I2C_DIRECTION_WRITE)
{
/* Enable Buffer Interrupts */
LL_I2C_EnableIT_BUF(I2C1);
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C1);
}
}
/* Check RXNE flag value in ISR register */
else if(LL_I2C_IsActiveFlag_RXNE(I2C1))
{
/* Call function Slave Reception Callback */
Slave_Reception_Callback();
}
/* Check TXE flag value in ISR register */
else if(LL_I2C_IsActiveFlag_TXE(I2C1))
{
/* Call function Slave Ready to Transmit Callback */
Slave_Ready_To_Transmit_Callback();
}
/* Check BTF flag value in ISR register */
else if(LL_I2C_IsActiveFlag_BTF(I2C1))
{
if(LL_I2C_GetTransferDirection(I2C1) == LL_I2C_DIRECTION_WRITE)
{
/* Send the next byte */
/* Call function Slave Ready to Transmit Callback */
Slave_Ready_To_Transmit_Callback();
}
else
{
/* Call function Slave Reception Callback */
Slave_Reception_Callback();
}
}
/* Check STOP flag value in ISR register */
else if(LL_I2C_IsActiveFlag_STOP(I2C1))
{
/* Clear STOP flag value in ISR register */
LL_I2C_ClearFlag_STOP(I2C1);
/* Call function Slave Complete Callback */
Slave_Complete_Callback();
}
}
/**
* Brief This function handles I2C1 (Slave) error interrupt request.
* Param None
* Retval None
*/
void I2C1_ER_IRQHandler(void)
{
/* Normal use case, if all bytes are sent and Acknowledge failure appears */
/* This correspond to the end of communication */
if((ubSlaveNbDataToTransmit == 0) && \
(LL_I2C_IsActiveFlag_AF(I2C1)) && \
(LL_I2C_GetTransferDirection(I2C1) == LL_I2C_DIRECTION_WRITE))
{
/* Clear AF flag value in ISR register */
LL_I2C_ClearFlag_AF(I2C1);
/* Call function Slave Complete Callback */
Slave_Complete_Callback();
}
else
{
/* Call Error function */
Error_Callback();
}
}
/**
* Brief This function handles I2C2 (Master) interrupt request.
* Param None
* Retval None
*/
void I2C2_EV_IRQHandler(void)
{
/* Check SB flag value in ISR register */
if(LL_I2C_IsActiveFlag_SB(I2C2))
{
/* Send Slave address with a 7-Bit SLAVE_OWN_ADDRESS for a ubMasterRequestDirection request */
LL_I2C_TransmitData8(I2C2, SLAVE_OWN_ADDRESS | ubMasterRequestDirection);
}
/* Check ADDR flag value in ISR register */
else if(LL_I2C_IsActiveFlag_ADDR(I2C2))
{
/* Verify the transfer direction */
if(LL_I2C_GetTransferDirection(I2C2) == LL_I2C_DIRECTION_READ)
{
ubMasterXferDirection = LL_I2C_DIRECTION_READ;
if(ubMasterNbDataToReceive == 1)
{
/* Prepare the generation of a Non ACKnowledge condition after next received byte */
LL_I2C_AcknowledgeNextData(I2C2, LL_I2C_NACK);
/* Enable DMA transmission requests */
LL_I2C_EnableDMAReq_RX(I2C2);
}
else if(ubMasterNbDataToReceive == 2)
{
/* Prepare the generation of a Non ACKnowledge condition after next received byte */
LL_I2C_AcknowledgeNextData(I2C2, LL_I2C_NACK);
/* Enable Pos */
LL_I2C_EnableBitPOS(I2C2);
}
else
{
/* Enable Last DMA bit */
LL_I2C_EnableLastDMA(I2C2);
/* Enable DMA transmission requests */
LL_I2C_EnableDMAReq_RX(I2C2);
}
}
else
{
ubMasterXferDirection = LL_I2C_DIRECTION_WRITE;
/* Enable DMA transmission requests */
LL_I2C_EnableDMAReq_TX(I2C2);
}
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C2);
}
}
/**
* Brief This function handles I2C2 (Master) error interrupt request.
* Param None
* Retval None
*/
void I2C2_ER_IRQHandler(void)
{
/* Call Error function */
Error_Callback();
}
/**
* @brief This function handles DMA1_Channel4 interrupt request.
* @param None
* @retval None
*/
void DMA1_Channel4_IRQHandler(void)
{
if(LL_DMA_IsActiveFlag_TC4(DMA1))
{
LL_DMA_ClearFlag_TC4(DMA1);
Transfer_Complete_Callback();
}
else if(LL_DMA_IsActiveFlag_TE4(DMA1))
{
Transfer_Error_Callback();
}
}
/**
* @brief This function handles DMA1_Channel5 interrupt request.
* @param None
* @retval None
*/
void DMA1_Channel5_IRQHandler(void)
{
if(LL_DMA_IsActiveFlag_TC5(DMA1))
{
LL_DMA_ClearFlag_TC5(DMA1);
Transfer_Complete_Callback();
}
else if(LL_DMA_IsActiveFlag_TE5(DMA1))
{
Transfer_Error_Callback();
}
}
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_AdvCommunication_DMAAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_AdvCommunication_DMAAndIT\Src\system_stm32f1xx.c | /**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC->CFGR &= 0xF8FF0000U;
#else
RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull = ( pllmull >> 18U) + 2U;
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
#endif
}
#else
pllmull = pllmull >> 18U;
if (pllmull != 0x0DU)
{
pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
pllmull = 13U / 2U;
}
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
else
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
#endif /* STM32F105xC */
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
(void)(tmpreg);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD->CRL = 0x44BB44BBU;
GPIOD->CRH = 0xBBBBBBBBU;
GPIOE->CRL = 0xB44444BBU;
GPIOE->CRH = 0xBBBBBBBBU;
GPIOF->CRL = 0x44BBBBBBU;
GPIOF->CRH = 0xBBBB4444U;
GPIOG->CRL = 0x44BBBBBBU;
GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1->BTCR[4U] = 0x00001091U;
FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_DMAAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_DMAAndIT\Inc\main.h | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT/Inc/main.h
* @author MCD Application Team
* @brief Header for main.c module
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_ll_bus.h"
#include "stm32f1xx_ll_rcc.h"
#include "stm32f1xx_ll_system.h"
#include "stm32f1xx_ll_utils.h"
#include "stm32f1xx_ll_cortex.h"
#include "stm32f1xx_ll_gpio.h"
#include "stm32f1xx_ll_exti.h"
#include "stm32f1xx_ll_dma.h"
#include "stm32f1xx_ll_i2c.h"
#include "stm32f1xx_ll_pwr.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Define used to enable time-out management*/
#define USE_TIMEOUT 0
/**
* @brief LED2
*/
#define LED2_PIN LL_GPIO_PIN_5
#define LED2_GPIO_PORT GPIOA
#define LED2_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA)
/**
* @brief Toggle periods for various blinking modes
*/
#define LED_BLINK_FAST 200
#define LED_BLINK_SLOW 500
#define LED_BLINK_ERROR 1000
/**
* @brief Key push-button
*/
#define USER_BUTTON_PIN LL_GPIO_PIN_13
#define USER_BUTTON_GPIO_PORT GPIOC
#define USER_BUTTON_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOC)
#define USER_BUTTON_EXTI_LINE LL_EXTI_LINE_13
#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
#define USER_BUTTON_EXTI_LINE_ENABLE() LL_EXTI_EnableIT_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_EXTI_FALLING_TRIG_ENABLE() LL_EXTI_EnableFallingTrig_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_SYSCFG_SET_EXTI() do { \
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO); \
LL_GPIO_AF_SetEXTISource(LL_GPIO_AF_EXTI_PORTC, LL_GPIO_AF_EXTI_LINE13); \
} while(0)
#define USER_BUTTON_IRQHANDLER EXTI15_10_IRQHandler
/**
* @brief Slave settings
*/
#define SLAVE_OWN_ADDRESS 0x5A /* This value is a left shift of a real 7 bits of a slave address
value which can find in a Datasheet as example: b0101101
mean in uint8_t equivalent at 0x2D and this value can be
seen in the OAR1 register in bits ADD[1:7] */
/**
* @brief Master Transfer Request Direction
*/
#define I2C_REQUEST_WRITE 0x00
#define I2C_REQUEST_READ 0x01
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
/* IRQ Handler treatment functions */
void UserButton_Callback(void);
void Slave_Reception_Callback(void);
void Slave_Complete_Callback(void);
void Transfer_Complete_Callback(void);
void Transfer_Error_Callback(void);
void Error_Callback(void);
#endif /* __MAIN_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_DMAAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_DMAAndIT\Inc\stm32f1xx_it.h | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT/Inc/stm32f1xx_it.h
* @author MCD Application Team
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_IT_H
#define __STM32F1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void USER_BUTTON_IRQHANDLER(void);
void I2C1_EV_IRQHandler(void);
void I2C1_ER_IRQHandler(void);
void I2C2_EV_IRQHandler(void);
void I2C2_ER_IRQHandler(void);
void DMA1_Channel4_IRQHandler(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F1xx_IT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_DMAAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_DMAAndIT\Inc\stm32_assert.h | /**
******************************************************************************
* @file stm32_assert.h
* @author MCD Application Team
* @brief STM32 assert template file.
* This file should be copied to the application folder and renamed
* to stm32_assert.h.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_ASSERT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_DMAAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_DMAAndIT\Src\main.c | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT/Src/main.c
* @author MCD Application Team
* @brief This example describes how to send/receive bytes over I2C IP using
* the STM32F1xx I2C LL API.
* Peripheral initialization done using LL unitary services functions.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup I2C_OneBoard_Communication_DMAAndIT
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/**
* @brief Timeout value
*/
#if (USE_TIMEOUT == 1)
#define DMA_SEND_TIMEOUT_TC_MS 5
#endif /* USE_TIMEOUT */
/**
* @brief I2C devices settings
*/
/* I2C SPEEDCLOCK define to max value: 400 KHz */
#define I2C_SPEEDCLOCK 400000
#define I2C_DUTYCYCLE LL_I2C_DUTYCYCLE_2
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
#if (USE_TIMEOUT == 1)
uint32_t Timeout = 0; /* Variable used for Timeout management */
#endif /* USE_TIMEOUT */
__IO uint8_t ubButtonPress = 0;
/**
* @brief Variables related to MasterTransmit process
*/
const uint8_t aLedOn[] = "LED ON";
__IO uint8_t ubNbDataToTransmit = sizeof(aLedOn);
uint8_t* pTransmitBuffer = (uint8_t*)aLedOn;
__IO uint8_t ubTransferComplete = 0;
/**
* @brief Variables related to SlaveReceive process
*/
uint8_t aReceiveBuffer[0xF] = {0};
__IO uint8_t ubReceiveIndex = 0;
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void Configure_DMA(void);
void Configure_I2C_Slave(void);
void Configure_I2C_Master(void);
void Activate_I2C_Slave(void);
void Activate_I2C_Master(void);
uint8_t Buffercmp8(uint8_t* pBuffer1, uint8_t* pBuffer2, uint8_t BufferLength);
void LED_Init(void);
void LED_On(void);
void LED_Off(void);
void LED_Blinking(uint32_t Period);
void WaitForUserButtonPress(void);
void Handle_I2C_Slave(void);
void Handle_I2C_Master(void);
void UserButton_Init(void);
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/* Configure the system clock to 72 MHz */
SystemClock_Config();
/* Initialize LED2 */
LED_Init();
/* Set LED2 Off */
LED_Off();
/* Initialize User push-button in EXTI mode */
UserButton_Init();
/* Configure DMA1_Channel4 (DMA IP configuration in transfer memory to peripheral (I2C2) */
Configure_DMA();
/* Configure I2C1 (I2C IP configuration in Slave mode and related GPIO initialization) */
Configure_I2C_Slave();
/* Configure I2C2 (I2C IP configuration in Master mode and related GPIO initialization) */
Configure_I2C_Master();
/* Enable the I2C1 peripheral (Slave) */
Activate_I2C_Slave();
/* Enable the I2C2 peripheral (Master) */
Activate_I2C_Master();
/* Wait for User push-button press to start transfer */
WaitForUserButtonPress();
/* Handle I2C1 events (Slave) */
Handle_I2C_Slave();
/* Handle I2C2 events (Master) */
Handle_I2C_Master();
/* Infinite loop */
while (1)
{
}
}
/**
* @brief This function configures the DMA1_Channel4 to copy data from
* Flash memory(pTransmitBuffer) to I2C2(TXDR).
* @note This function is used to :
* -1- Enable DMA1 clock
* -2- Configure NVIC for DMA1.
* -3- Configure the DMA1 functional parameters.
* -4- Enable DMA1 interrupts complete/error.
* @param None
* @retval None
*/
void Configure_DMA(void)
{
/* (1) Enable the clock of DMA1 */
LL_AHB1_GRP1_EnableClock(LL_AHB1_GRP1_PERIPH_DMA1);
/* (2) Configure NVIC for DMA1 */
NVIC_SetPriority(DMA1_Channel4_IRQn, 0);
NVIC_EnableIRQ(DMA1_Channel4_IRQn);
/* (3) Configure the DMA1 functional parameters */
LL_DMA_ConfigTransfer(DMA1, LL_DMA_CHANNEL_4, LL_DMA_DIRECTION_MEMORY_TO_PERIPH | \
LL_DMA_PRIORITY_HIGH | \
LL_DMA_MODE_NORMAL | \
LL_DMA_PERIPH_NOINCREMENT | \
LL_DMA_MEMORY_INCREMENT | \
LL_DMA_PDATAALIGN_BYTE | \
LL_DMA_MDATAALIGN_BYTE);
LL_DMA_SetDataLength(DMA1, LL_DMA_CHANNEL_4, ubNbDataToTransmit);
LL_DMA_ConfigAddresses(DMA1, LL_DMA_CHANNEL_4, (uint32_t)(pTransmitBuffer), (uint32_t)LL_I2C_DMA_GetRegAddr(I2C2), LL_DMA_GetDataTransferDirection(DMA1, LL_DMA_CHANNEL_4));
/* (4) Enable DMA1 interrupts complete/error */
LL_DMA_EnableIT_TC(DMA1, LL_DMA_CHANNEL_4);
LL_DMA_EnableIT_TE(DMA1, LL_DMA_CHANNEL_4);
}
/**
* @brief This function configures I2C1 in Slave mode.
* @note This function is used to :
* -1- Enables GPIO clock.
* -2- Enable the I2C1 peripheral clock and configures the I2C1 pins.
* -3- Configure NVIC for I2C1.
* -4- Configure I2C1 functional parameters.
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_I2C_Slave(void)
{
/* (1) Enables GPIO clock */
/* Enable the peripheral clock of GPIOB */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
/* (2) Enable the I2C1 peripheral clock *************************************/
/* Enable the peripheral clock for I2C1 */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1);
/* Configure SCL Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_6, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_6, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_6, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_6, LL_GPIO_PULL_UP);
/* Configure SDA Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_7, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_7, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_7, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_7, LL_GPIO_PULL_UP);
/* (3) Configure NVIC for I2C1 **********************************************/
/* Configure Event IT:
* - Set priority for I2C1_EV_IRQn
* - Enable I2C1_EV_IRQn
*/
NVIC_SetPriority(I2C1_EV_IRQn, 0);
NVIC_EnableIRQ(I2C1_EV_IRQn);
/* Configure Error IT:
* - Set priority for I2C1_ER_IRQn
* - Enable I2C1_ER_IRQn
*/
NVIC_SetPriority(I2C1_ER_IRQn, 0);
NVIC_EnableIRQ(I2C1_ER_IRQn);
/* (4) Configure I2C1 functional parameters ***********************/
/* Disable I2C1 prior modifying configuration registers */
LL_I2C_Disable(I2C1);
/* Configure the Own Address1 :
* - OwnAddress1 is SLAVE_OWN_ADDRESS
* - OwnAddrSize is LL_I2C_OWNADDRESS1_7BIT
*/
LL_I2C_SetOwnAddress1(I2C1, SLAVE_OWN_ADDRESS, LL_I2C_OWNADDRESS1_7BIT);
/* Enable Clock stretching */
/* Reset Value is Clock stretching enabled */
//LL_I2C_EnableClockStretching(I2C1);
/* Enable General Call */
/* Reset Value is General Call disabled */
//LL_I2C_EnableGeneralCall(I2C1);
/* Configure the 7bits Own Address2 */
/* Reset Values of :
* - OwnAddress2 is 0x00
* - Own Address2 is disabled
*/
//LL_I2C_SetOwnAddress2(I2C1, 0x00);
//LL_I2C_DisableOwnAddress2(I2C1);
/* Enable Peripheral in I2C mode */
/* Reset Value is I2C mode */
//LL_I2C_SetMode(I2C1, LL_I2C_MODE_I2C);
}
/**
* @brief This function configures I2C2 in Master mode.
* @note This function is used to :
* -1- Enables GPIO clock.
* -2- Enable the I2C2 peripheral clock and configures the I2C2 pins.
* -3- Configure NVIC for I2C2.
* -4- Configure I2C2 functional parameters.
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_I2C_Master(void)
{
LL_RCC_ClocksTypeDef rcc_clocks;
/* (1) Enables GPIO clock **********************/
/* Enable the peripheral clock of GPIOB */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
/* (2) Enable the I2C2 peripheral clock *************************************/
/* Enable the peripheral clock for I2C2 */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C2);
/* Configure SCL Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_10, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_10, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_10, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_10, LL_GPIO_PULL_UP);
/* Configure SDA Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_11, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_11, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_11, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_11, LL_GPIO_PULL_UP);
/* (3) Configure NVIC for I2C2 **********************************************/
/* Configure Event IT:
* - Set priority for I2C2_EV_IRQn
* - Enable I2C2_EV_IRQn
*/
NVIC_SetPriority(I2C2_EV_IRQn, 0);
NVIC_EnableIRQ(I2C2_EV_IRQn);
/* Configure Error IT:
* - Set priority for I2C2_ER_IRQn
* - Enable I2C2_ER_IRQn
*/
NVIC_SetPriority(I2C2_ER_IRQn, 0);
NVIC_EnableIRQ(I2C2_ER_IRQn);
/* (4) Configure I2C2 functional parameters ********************************/
/* Disable I2C2 prior modifying configuration registers */
LL_I2C_Disable(I2C2);
/* Retrieve Clock frequencies */
LL_RCC_GetSystemClocksFreq(&rcc_clocks);
/* Configure the SCL Clock Speed */
LL_I2C_ConfigSpeed(I2C2, rcc_clocks.PCLK1_Frequency, I2C_SPEEDCLOCK, I2C_DUTYCYCLE);
/* Configure the Own Address1 */
/* Reset Values of :
* - OwnAddress1 is 0x00
* - OwnAddrSize is LL_I2C_OWNADDRESS1_7BIT
*/
//LL_I2C_SetOwnAddress1(I2C2, 0x00, LL_I2C_OWNADDRESS1_7BIT);
/* Enable Clock stretching */
/* Reset Value is Clock stretching enabled */
//LL_I2C_EnableClockStretching(I2C2);
/* Enable General Call */
/* Reset Value is General Call disabled */
//LL_I2C_EnableGeneralCall(I2C2);
/* Configure the 7bits Own Address2 */
/* Reset Values of :
* - OwnAddress2 is 0x00
* - Own Address2 is disabled
*/
//LL_I2C_SetOwnAddress2(I2C2, 0x00);
//LL_I2C_DisableOwnAddress2(I2C2);
/* Enable Peripheral in I2C mode */
/* Reset Value is I2C mode */
//LL_I2C_SetMode(I2C2, LL_I2C_MODE_I2C);
}
/**
* @brief This function Activate I2C1 peripheral (Slave)
* @note This function is used to :
* -1- Enable I2C1.
* -2- Enable I2C1 transfer event/error interrupts.
* @param None
* @retval None
*/
void Activate_I2C_Slave(void)
{
/* (1) Enable I2C1 **********************************************************/
LL_I2C_Enable(I2C1);
/* (2) Enable I2C1 transfer event/error interrupts:
* - Enable Events interrupts
* - Enable Errors interrupts
*/
LL_I2C_EnableIT_EVT(I2C1);
LL_I2C_EnableIT_ERR(I2C1);
}
/**
* @brief This function Activate I2C2 peripheral (Master)
* @note This function is used to :
* -1- Enable I2C2.
* -2- Enable I2C2 transfer event/error interrupts.
* @param None
* @retval None
*/
void Activate_I2C_Master(void)
{
/* (1) Enable I2C2 **********************************************************/
LL_I2C_Enable(I2C2);
/* (2) Enable I2C2 transfer event/error interrupts:
* - Enable Events interrupts
* - Enable Errors interrupts
*/
LL_I2C_EnableIT_EVT(I2C2);
LL_I2C_EnableIT_ERR(I2C2);
}
/**
* @brief Compares two 8-bit buffers and returns the comparison result.
* @param pBuffer1: pointer to the source buffer to be compared to.
* @param pBuffer2: pointer to the second source buffer to be compared to the first.
* @param BufferLength: buffer's length.
* @retval 0: Comparison is OK (the two Buffers are identical)
* Value different from 0: Comparison is NOK (Buffers are different)
*/
uint8_t Buffercmp8(uint8_t* pBuffer1, uint8_t* pBuffer2, uint8_t BufferLength)
{
while (BufferLength--)
{
if (*pBuffer1 != *pBuffer2)
{
return 1;
}
pBuffer1++;
pBuffer2++;
}
return 0;
}
/**
* @brief Initialize LED2.
* @param None
* @retval None
*/
void LED_Init(void)
{
/* Enable the LED2 Clock */
LED2_GPIO_CLK_ENABLE();
/* Configure IO in output push-pull mode to drive external LED2 */
LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
/* Reset value is LL_GPIO_OUTPUT_PUSHPULL */
//LL_GPIO_SetPinOutputType(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_OUTPUT_PUSHPULL);
/* Reset value is LL_GPIO_SPEED_FREQ_LOW */
//LL_GPIO_SetPinSpeed(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_SPEED_FREQ_LOW);
/* Reset value is LL_GPIO_PULL_NO */
//LL_GPIO_SetPinPull(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_PULL_NO);
}
/**
* @brief Turn-on LED2.
* @param None
* @retval None
*/
void LED_On(void)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Turn-off LED2.
* @param None
* @retval None
*/
void LED_Off(void)
{
/* Turn LED2 off */
LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Set LED2 to Blinking mode for an infinite loop (toggle period based on value provided as input parameter).
* @param Period : Period of time (in ms) between each toggling of LED
* This parameter can be user defined values. Pre-defined values used in that example are :
* @arg LED_BLINK_FAST : Fast Blinking
* @arg LED_BLINK_SLOW : Slow Blinking
* @arg LED_BLINK_ERROR : Error specific Blinking
* @retval None
*/
void LED_Blinking(uint32_t Period)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
/* Toggle IO in an infinite loop */
while (1)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(Period);
}
}
/**
* @brief Configures User push-button in GPIO or EXTI Line Mode.
* @param None
* @retval None
*/
void UserButton_Init(void)
{
/* Enable the BUTTON Clock */
USER_BUTTON_GPIO_CLK_ENABLE();
/* Configure GPIO for BUTTON */
LL_GPIO_SetPinMode(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_MODE_INPUT);
/* Connect External Line to the GPIO*/
USER_BUTTON_SYSCFG_SET_EXTI();
/* Enable a rising trigger External line 13 Interrupt */
USER_BUTTON_EXTI_LINE_ENABLE();
USER_BUTTON_EXTI_FALLING_TRIG_ENABLE();
/* Configure NVIC for USER_BUTTON_EXTI_IRQn */
NVIC_EnableIRQ(USER_BUTTON_EXTI_IRQn);
NVIC_SetPriority(USER_BUTTON_EXTI_IRQn, 0x03);
}
/**
* @brief Wait for User push-button press to start transfer.
* @param None
* @retval None
*/
/* */
void WaitForUserButtonPress(void)
{
while (ubButtonPress == 0)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(LED_BLINK_FAST);
}
/* Turn LED2 off */
LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief This Function handle Slave events to perform a transmission process
* @note This function is composed in one step :
* -1- Prepare acknowledge for Slave address reception.
* @param None
* @retval None
*/
void Handle_I2C_Slave(void)
{
/* (1) Prepare acknowledge for Slave address reception **********************/
LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_ACK);
}
/**
* @brief This Function handle Master events to perform a transmission process
* @note This function is composed in different steps :
* -1- Enable DMA transfer.
* -2- Prepare acknowledge for Master data reception.
* -3- Initiate a Start condition to the Slave device.
* -4- Loop until end of transfer completed (DMA TC raised).
* -5- End of transfer, Data consistency are checking into Slave process.
* @param None
* @retval None
*/
void Handle_I2C_Master(void)
{
/* (1) Enable DMA transfer **************************************************/
LL_DMA_EnableChannel(DMA1, LL_DMA_CHANNEL_4);
/* (2) Prepare acknowledge for Master data reception ************************/
LL_I2C_AcknowledgeNextData(I2C2, LL_I2C_ACK);
/* (3) Initiate a Start condition to the Slave device ***********************/
/* Master Generate Start condition */
LL_I2C_GenerateStartCondition(I2C2);
/* (4) Loop until end of transfer completed (DMA TC raised) *****************/
#if (USE_TIMEOUT == 1)
Timeout = DMA_SEND_TIMEOUT_TC_MS;
#endif /* USE_TIMEOUT */
/* Loop until DMA transfer complete event */
while(!ubTransferComplete)
{
#if (USE_TIMEOUT == 1)
/* Check Systick counter flag to decrement the time-out value */
if (LL_SYSTICK_IsActiveCounterFlag())
{
if(Timeout-- == 0)
{
/* Time-out occurred. Set LED to blinking mode */
LED_Blinking(LED_BLINK_SLOW);
}
}
#endif /* USE_TIMEOUT */
}
/* (5) End of transfer, Data consistency are checking into Slave process *****/
}
/**
* @brief System Clock Configuration
* The system Clock is configured as follow :
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 72000000
* HCLK(Hz) = 72000000
* AHB Prescaler = 1
* APB1 Prescaler = 2
* APB2 Prescaler = 1
* HSE Frequency(Hz) = 8000000
* PLLMUL = 9
* Flash Latency(WS) = 2
* @param None
* @retval None
*/
void SystemClock_Config(void)
{
/* Set FLASH latency */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
/* Enable HSE oscillator */
LL_RCC_HSE_EnableBypass();
LL_RCC_HSE_Enable();
while(LL_RCC_HSE_IsReady() != 1)
{
};
/* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
LL_RCC_PLL_Enable();
while(LL_RCC_PLL_IsReady() != 1)
{
};
/* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
};
/* Set APB1 & APB2 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
/* Set systick to 1ms in using frequency set to 72MHz */
LL_Init1msTick(72000000);
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(72000000);
}/******************************************************************************/
/* IRQ HANDLER TREATMENT Functions */
/******************************************************************************/
/**
* @brief Function to manage User push-button
* @param None
* @retval None
*/
void UserButton_Callback(void)
{
/* Update User push-button variable : to be checked in waiting loop in main program */
ubButtonPress = 1;
}
/**
* @brief Function called from I2C IRQ Handler when RXNE flag is set
* Function is in charge of retrieving received byte on I2C lines.
* @param None
* @retval None
*/
void Slave_Reception_Callback(void)
{
/* Read character in Receive Data register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
}
/**
* @brief Function called from I2C IRQ Handler when STOP flag is set
* Function is in charge of checking data received,
* LED2 is On if data are correct.
* @param None
* @retval None
*/
void Slave_Complete_Callback(void)
{
/* Check if data request to turn on the LED2 */
if(Buffercmp8((uint8_t*)aReceiveBuffer, (uint8_t*)aLedOn, (ubReceiveIndex-1)) == 0)
{
/* Turn LED2 On:
* - Expected bytes have been received
* - Slave Rx sequence completed successfully
*/
LED_On();
}
else
{
/* Call Error function */
Error_Callback();
}
}
/**
* @brief DMA transfer complete callback
* @note This function is executed when the transfer complete interrupt
* is generated
* @retval None
*/
void Transfer_Complete_Callback()
{
/* Generate Stop condition */
LL_I2C_GenerateStopCondition(I2C2);
/* DMA transfer completed */
ubTransferComplete = 1;
}
/**
* @brief DMA transfer error callback
* @note This function is executed when the transfer error interrupt
* is generated during DMA transfer
* @retval None
*/
void Transfer_Error_Callback()
{
/* Disable DMA1_Channel4_IRQn */
NVIC_DisableIRQ(DMA1_Channel4_IRQn);
/* Error detected during DMA transfer */
LED_Blinking(LED_BLINK_ERROR);
}
/**
* @brief Function called in case of error detected in I2C IT Handler
* @param None
* @retval None
*/
void Error_Callback(void)
{
/* Disable I2C1_EV_IRQn */
NVIC_DisableIRQ(I2C1_EV_IRQn);
/* Disable I2C1_ER_IRQn */
NVIC_DisableIRQ(I2C1_ER_IRQn);
/* Unexpected event : Set LED2 to Blinking mode to indicate error occurs */
LED_Blinking(LED_BLINK_ERROR);
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_DMAAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_DMAAndIT\Src\stm32f1xx_it.c | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_Communication_DMAAndIT/Src/stm32f1xx_it.c
* @author MCD Application Team
* @brief Main Interrupt Service Routines.
* This file provides template for all exceptions handler and
* peripherals interrupt service routine.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_it.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup I2C_OneBoard_Communication_DMAAndIT
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
/**
* @brief This function handles PendSVC exception.
* @param None
* @retval None
*/
void PendSV_Handler(void)
{
}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
void SysTick_Handler(void)
{
}
/******************************************************************************/
/* STM32F1xx Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @brief This function handles external lines 10 to 15 interrupt request.
* @param None
* @retval None
*/
void USER_BUTTON_IRQHANDLER(void)
{
/* Manage Flags */
if(LL_EXTI_IsActiveFlag_0_31(USER_BUTTON_EXTI_LINE) != RESET)
{
LL_EXTI_ClearFlag_0_31(USER_BUTTON_EXTI_LINE);
/* Manage code in main.c.*/
UserButton_Callback();
}
}
/**
* Brief This function handles I2C1 (Slave) event interrupt request.
* Param None
* Retval None
*/
void I2C1_EV_IRQHandler(void)
{
/* Check ADDR flag value in ISR register */
if(LL_I2C_IsActiveFlag_ADDR(I2C1))
{
/* Verify the slave transfer direction, a read direction, Slave enters receiver mode */
if(LL_I2C_GetTransferDirection(I2C1) == LL_I2C_DIRECTION_READ)
{
/* Enable Buffer Interrupts */
LL_I2C_EnableIT_BUF(I2C1);
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C1);
}
else
{
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C1);
/* Call Error function */
Error_Callback();
}
}
/* Check RXNE flag value in ISR register */
else if(LL_I2C_IsActiveFlag_RXNE(I2C1))
{
/* Call function Slave Reception Callback */
Slave_Reception_Callback();
}
/* Check BTF flag value in ISR register */
else if(LL_I2C_IsActiveFlag_BTF(I2C1))
{
/* Call function Slave Reception Callback */
Slave_Reception_Callback();
}
/* Check STOP flag value in ISR register */
else if(LL_I2C_IsActiveFlag_STOP(I2C1))
{
/* Clear STOP flag value in ISR register */
LL_I2C_ClearFlag_STOP(I2C1);
/* Call function Slave Complete Callback */
Slave_Complete_Callback();
}
}
/**
* Brief This function handles I2C1 (Slave) error interrupt request.
* Param None
* Retval None
*/
void I2C1_ER_IRQHandler(void)
{
/* Call Error function */
Error_Callback();
}
/**
* Brief This function handles I2C2 (Master) interrupt request.
* Param None
* Retval None
*/
void I2C2_EV_IRQHandler(void)
{
/* Check SB flag value in ISR register */
if(LL_I2C_IsActiveFlag_SB(I2C2))
{
/* Send Slave address with a 7-Bit SLAVE_OWN_ADDRESS for a write request */
LL_I2C_TransmitData8(I2C2, SLAVE_OWN_ADDRESS | I2C_REQUEST_WRITE);
}
/* Check ADDR flag value in ISR register */
else if(LL_I2C_IsActiveFlag_ADDR(I2C2))
{
/* Enable DMA transmission requests */
LL_I2C_EnableDMAReq_TX(I2C2);
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C2);
}
}
/**
* Brief This function handles I2C2 (Master) error interrupt request.
* Param None
* Retval None
*/
void I2C2_ER_IRQHandler(void)
{
/* Call Error function */
Error_Callback();
}
/**
* @brief This function handles DMA1_Channel4 interrupt request.
* @param None
* @retval None
*/
void DMA1_Channel4_IRQHandler(void)
{
if(LL_DMA_IsActiveFlag_TC4(DMA1))
{
LL_DMA_ClearFlag_TC4(DMA1);
Transfer_Complete_Callback();
}
else if(LL_DMA_IsActiveFlag_TE4(DMA1))
{
Transfer_Error_Callback();
}
}
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_DMAAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_DMAAndIT\Src\system_stm32f1xx.c | /**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC->CFGR &= 0xF8FF0000U;
#else
RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull = ( pllmull >> 18U) + 2U;
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
#endif
}
#else
pllmull = pllmull >> 18U;
if (pllmull != 0x0DU)
{
pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
pllmull = 13U / 2U;
}
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
else
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
#endif /* STM32F105xC */
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
(void)(tmpreg);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD->CRL = 0x44BB44BBU;
GPIOD->CRH = 0xBBBBBBBBU;
GPIOE->CRL = 0xB44444BBU;
GPIOE->CRH = 0xBBBBBBBBU;
GPIOF->CRL = 0x44BBBBBBU;
GPIOF->CRH = 0xBBBB4444U;
GPIOG->CRL = 0x44BBBBBBU;
GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1->BTCR[4U] = 0x00001091U;
FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT\Inc\main.h | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_Communication_IT/Inc/main.h
* @author MCD Application Team
* @brief Header for main.c module
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_ll_bus.h"
#include "stm32f1xx_ll_rcc.h"
#include "stm32f1xx_ll_system.h"
#include "stm32f1xx_ll_utils.h"
#include "stm32f1xx_ll_gpio.h"
#include "stm32f1xx_ll_exti.h"
#include "stm32f1xx_ll_i2c.h"
#include "stm32f1xx_ll_pwr.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/**
* @brief LED2
*/
#define LED2_PIN LL_GPIO_PIN_5
#define LED2_GPIO_PORT GPIOA
#define LED2_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA)
/**
* @brief Toggle periods for various blinking modes
*/
#define LED_BLINK_FAST 200
#define LED_BLINK_SLOW 500
#define LED_BLINK_ERROR 1000
/**
* @brief Key push-button
*/
#define USER_BUTTON_PIN LL_GPIO_PIN_13
#define USER_BUTTON_GPIO_PORT GPIOC
#define USER_BUTTON_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOC)
#define USER_BUTTON_EXTI_LINE LL_EXTI_LINE_13
#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
#define USER_BUTTON_EXTI_LINE_ENABLE() LL_EXTI_EnableIT_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_EXTI_FALLING_TRIG_ENABLE() LL_EXTI_EnableFallingTrig_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_SYSCFG_SET_EXTI() do { \
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO); \
LL_GPIO_AF_SetEXTISource(LL_GPIO_AF_EXTI_PORTC, LL_GPIO_AF_EXTI_LINE13); \
} while(0)
#define USER_BUTTON_IRQHANDLER EXTI15_10_IRQHandler
/**
* @brief Slave settings
*/
#define SLAVE_OWN_ADDRESS 0x5A /* This value is a left shift of a real 7 bits of a slave address
value which can find in a Datasheet as example: b0101101
mean in uint8_t equivalent at 0x2D and this value can be
seen in the OAR1 register in bits ADD[1:7] */
/**
* @brief Master Transfer Request Direction
*/
#define I2C_REQUEST_WRITE 0x00
#define I2C_REQUEST_READ 0x01
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
/* IRQ Handler treatment functions */
void UserButton_Callback(void);
void Slave_Ready_To_Transmit_Callback(void);
void Slave_Complete_Callback(void);
void Master_Reception_Callback(void);
void Master_Complete_Callback(void);
void Error_Callback(void);
#endif /* __MAIN_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT\Inc\stm32f1xx_it.h | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_Communication_IT/Inc/stm32f1xx_it.h
* @author MCD Application Team
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_IT_H
#define __STM32F1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void USER_BUTTON_IRQHANDLER(void);
void I2C2_EV_IRQHandler(void);
void I2C2_ER_IRQHandler(void);
void I2C1_EV_IRQHandler(void);
void I2C1_ER_IRQHandler(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F1xx_IT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT\Inc\stm32_assert.h | /**
******************************************************************************
* @file stm32_assert.h
* @author MCD Application Team
* @brief STM32 assert template file.
* This file should be copied to the application folder and renamed
* to stm32_assert.h.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_ASSERT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT\Src\main.c | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_Communication_IT/Src/main.c
* @author MCD Application Team
* @brief This example describes how to send/receive bytes over I2C IP using
* the STM32F1xx I2C LL API.
* Peripheral initialization done using LL unitary services functions.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup I2C_OneBoard_Communication_IT
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/**
* @brief I2C devices settings
*/
/* I2C SPEEDCLOCK define to max value: 400 KHz */
#define I2C_SPEEDCLOCK 400000
#define I2C_DUTYCYCLE LL_I2C_DUTYCYCLE_2
/**
* @brief Define related to SlaveTransmit process
*/
#define SLAVE_BYTE_TO_SEND (uint8_t)0xA5
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
__IO uint8_t ubNbDataToTransmit = sizeof(SLAVE_BYTE_TO_SEND);
__IO uint8_t ubNbDataToReceive = sizeof(SLAVE_BYTE_TO_SEND);
__IO uint8_t ubButtonPress = 0;
/**
* @brief Variables related to MasterReceive process
*/
uint8_t aReceiveBuffer[0xF] = {0};
__IO uint8_t ubReceiveIndex = 0;
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void Configure_I2C_Slave(void);
void Configure_I2C_Master(void);
void Activate_I2C_Slave(void);
void Activate_I2C_Master(void);
void LED_Init(void);
void LED_On(void);
void LED_Off(void);
void LED_Blinking(uint32_t Period);
void WaitForUserButtonPress(void);
void Handle_I2C_Slave(void);
void Handle_I2C_Master(void);
void UserButton_Init(void);
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/* Configure the system clock to 72 MHz */
SystemClock_Config();
/* Initialize LED2 */
LED_Init();
/* Set LED2 Off */
LED_Off();
/* Initialize User push-button in EXTI mode */
UserButton_Init();
/* Configure I2C2 (I2C IP configuration in Slave mode and related GPIO initialization) */
Configure_I2C_Slave();
/* Configure I2C1 (I2C IP configuration in Master mode and related GPIO initialization) */
Configure_I2C_Master();
/* Enable the I2C2 peripheral (Slave) */
Activate_I2C_Slave();
/* Enable the I2C1 peripheral (Master) */
Activate_I2C_Master();
/* Wait for User push-button press to start transfer */
WaitForUserButtonPress();
/* Handle I2C2 events (Slave) */
Handle_I2C_Slave();
/* Handle I2C1 events (Master) */
Handle_I2C_Master();
/* Infinite loop */
while (1)
{
}
}
/**
* @brief This function configures I2C2 in Slave mode.
* @note This function is used to :
* -1- Enables GPIO clock.
* -2- Enable the I2C2 peripheral clock and configures the I2C2 pins.
* -3- Configure NVIC for I2C2.
* -4- Configure I2C2 functional parameters.
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_I2C_Slave(void)
{
/* (1) Enables GPIO clock */
/* Enable the peripheral clock of GPIOB */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
/* (2) Enable the I2C2 peripheral clock *************************************/
/* Enable the peripheral clock for I2C2 */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C2);
/* Configure SCL Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_10, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_10, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_10, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_10, LL_GPIO_PULL_UP);
/* Configure SDA Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_11, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_11, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_11, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_11, LL_GPIO_PULL_UP);
/* (3) Configure NVIC for I2C2 **********************************************/
/* Configure Event IT:
* - Set priority for I2C2_EV_IRQn
* - Enable I2C2_EV_IRQn
*/
NVIC_SetPriority(I2C2_EV_IRQn, 0);
NVIC_EnableIRQ(I2C2_EV_IRQn);
/* Configure Error IT:
* - Set priority for I2C2_ER_IRQn
* - Enable I2C2_ER_IRQn
*/
NVIC_SetPriority(I2C2_ER_IRQn, 0);
NVIC_EnableIRQ(I2C2_ER_IRQn);
/* (4) Configure I2C2 functional parameters ***********************/
/* Disable I2C2 prior modifying configuration registers */
LL_I2C_Disable(I2C2);
/* Configure the Own Address1 :
* - OwnAddress1 is SLAVE_OWN_ADDRESS
* - OwnAddrSize is LL_I2C_OWNADDRESS1_7BIT
*/
LL_I2C_SetOwnAddress1(I2C2, SLAVE_OWN_ADDRESS, LL_I2C_OWNADDRESS1_7BIT);
/* Enable Clock stretching */
/* Reset Value is Clock stretching enabled */
//LL_I2C_EnableClockStretching(I2C2);
/* Enable General Call */
/* Reset Value is General Call disabled */
//LL_I2C_EnableGeneralCall(I2C2);
/* Configure the 7bits Own Address2 */
/* Reset Values of :
* - OwnAddress2 is 0x00
* - Own Address2 is disabled
*/
//LL_I2C_SetOwnAddress2(I2C2, 0x00);
//LL_I2C_DisableOwnAddress2(I2C2);
/* Enable Peripheral in I2C mode */
/* Reset Value is I2C mode */
//LL_I2C_SetMode(I2C2, LL_I2C_MODE_I2C);
}
/**
* @brief This function configures I2C1 in Master mode.
* @note This function is used to :
* -1- Enables GPIO clock.
* -2- Enable the I2C1 peripheral clock and configures the I2C1 pins.
* -3- Configure NVIC for I2C1.
* -4- Configure I2C1 functional parameters.
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_I2C_Master(void)
{
LL_RCC_ClocksTypeDef rcc_clocks;
/* (1) Enables GPIO clock **********************/
/* Enable the peripheral clock of GPIOB */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
/* (2) Enable the I2C1 peripheral clock *************************************/
/* Enable the peripheral clock for I2C1 */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1);
/* Configure SCL Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_6, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_6, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_6, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_6, LL_GPIO_PULL_UP);
/* Configure SDA Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_7, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_7, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_7, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_7, LL_GPIO_PULL_UP);
/* (3) Configure NVIC for I2C1 **********************************************/
/* Configure Event IT:
* - Set priority for I2C1_EV_IRQn
* - Enable I2C1_EV_IRQn
*/
NVIC_SetPriority(I2C1_EV_IRQn, 0);
NVIC_EnableIRQ(I2C1_EV_IRQn);
/* Configure Error IT:
* - Set priority for I2C1_ER_IRQn
* - Enable I2C1_ER_IRQn
*/
NVIC_SetPriority(I2C1_ER_IRQn, 0);
NVIC_EnableIRQ(I2C1_ER_IRQn);
/* (4) Configure I2C1 functional parameters ********************************/
/* Disable I2C1 prior modifying configuration registers */
LL_I2C_Disable(I2C1);
/* Retrieve Clock frequencies */
LL_RCC_GetSystemClocksFreq(&rcc_clocks);
/* Configure the SCL Clock Speed */
LL_I2C_ConfigSpeed(I2C1, rcc_clocks.PCLK1_Frequency, I2C_SPEEDCLOCK, I2C_DUTYCYCLE);
/* Configure the Own Address1 */
/* Reset Values of :
* - OwnAddress1 is 0x00
* - OwnAddrSize is LL_I2C_OWNADDRESS1_7BIT
*/
//LL_I2C_SetOwnAddress1(I2C1, 0x00, LL_I2C_OWNADDRESS1_7BIT);
/* Enable Clock stretching */
/* Reset Value is Clock stretching enabled */
//LL_I2C_EnableClockStretching(I2C1);
/* Enable General Call */
/* Reset Value is General Call disabled */
//LL_I2C_EnableGeneralCall(I2C1);
/* Configure the 7bits Own Address2 */
/* Reset Values of :
* - OwnAddress2 is 0x00
* - Own Address2 is disabled
*/
//LL_I2C_SetOwnAddress2(I2C1, 0x00);
//LL_I2C_DisableOwnAddress2(I2C1);
/* Enable Peripheral in I2C mode */
/* Reset Value is I2C mode */
//LL_I2C_SetMode(I2C1, LL_I2C_MODE_I2C);
}
/**
* @brief This function Activate I2C2 peripheral (Slave)
* @note This function is used to :
* -1- Enable I2C2.
* -2- Enable I2C2 transfer event/error interrupts.
* @param None
* @retval None
*/
void Activate_I2C_Slave(void)
{
/* (1) Enable I2C2 **********************************************************/
LL_I2C_Enable(I2C2);
/* (2) Enable I2C2 transfer event/error interrupts:
* - Enable Events Interrupt
* - Enable Error interrupts
*/
LL_I2C_EnableIT_EVT(I2C2);
LL_I2C_EnableIT_ERR(I2C2);
}
/**
* @brief This function Activate I2C1 peripheral (Master)
* @note This function is used to :
* -1- Enable I2C1.
* -2- Enable I2C1 transfer event/error interrupts.
* @param None
* @retval None
*/
void Activate_I2C_Master(void)
{
/* (1) Enable I2C1 **********************************************************/
LL_I2C_Enable(I2C1);
/* (2) Enable I2C1 transfer event/error interrupts:
* - Enable Events interrupts
* - Enable Errors interrupts
*/
LL_I2C_EnableIT_EVT(I2C1);
LL_I2C_EnableIT_ERR(I2C1);
}
/**
* @brief Initialize LED2.
* @param None
* @retval None
*/
void LED_Init(void)
{
/* Enable the LED2 Clock */
LED2_GPIO_CLK_ENABLE();
/* Configure IO in output push-pull mode to drive external LED2 */
LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
/* Reset value is LL_GPIO_OUTPUT_PUSHPULL */
//LL_GPIO_SetPinOutputType(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_OUTPUT_PUSHPULL);
/* Reset value is LL_GPIO_SPEED_FREQ_LOW */
//LL_GPIO_SetPinSpeed(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_SPEED_FREQ_LOW);
/* Reset value is LL_GPIO_PULL_NO */
//LL_GPIO_SetPinPull(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_PULL_NO);
}
/**
* @brief Turn-on LED2.
* @param None
* @retval None
*/
void LED_On(void)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Turn-off LED2.
* @param None
* @retval None
*/
void LED_Off(void)
{
/* Turn LED2 off */
LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Set LED2 to Blinking mode for an infinite loop (toggle period based on value provided as input parameter).
* @param Period : Period of time (in ms) between each toggling of LED
* This parameter can be user defined values. Pre-defined values used in that example are :
* @arg LED_BLINK_FAST : Fast Blinking
* @arg LED_BLINK_SLOW : Slow Blinking
* @arg LED_BLINK_ERROR : Error specific Blinking
* @retval None
*/
void LED_Blinking(uint32_t Period)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
/* Toggle IO in an infinite loop */
while (1)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(Period);
}
}
/**
* @brief Configures User push-button in GPIO or EXTI Line Mode.
* @param None
* @retval None
*/
void UserButton_Init(void)
{
/* Enable the BUTTON Clock */
USER_BUTTON_GPIO_CLK_ENABLE();
/* Configure GPIO for BUTTON */
LL_GPIO_SetPinMode(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_MODE_INPUT);
/* Connect External Line to the GPIO*/
USER_BUTTON_SYSCFG_SET_EXTI();
/* Enable a rising trigger External line 13 Interrupt */
USER_BUTTON_EXTI_LINE_ENABLE();
USER_BUTTON_EXTI_FALLING_TRIG_ENABLE();
/* Configure NVIC for USER_BUTTON_EXTI_IRQn */
NVIC_EnableIRQ(USER_BUTTON_EXTI_IRQn);
NVIC_SetPriority(USER_BUTTON_EXTI_IRQn,0x03);
}
/**
* @brief Wait for User push-button press to start transfer.
* @param None
* @retval None
*/
/* */
void WaitForUserButtonPress(void)
{
while (ubButtonPress == 0)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(LED_BLINK_FAST);
}
/* Turn LED2 off */
LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief This Function handle Slave events to perform a transmission process
* @note This function is composed in one step :
* -1- Prepare acknowledge for Slave address reception.
* @param None
* @retval None
*/
void Handle_I2C_Slave(void)
{
/* (1) Prepare acknowledge for Slave address reception **********************/
LL_I2C_AcknowledgeNextData(I2C2, LL_I2C_ACK);
}
/**
* @brief This Function handle Master events to perform a reception process
* @note This function is composed in different steps :
* -1- Prepare acknowledge for Master data reception.
* -2- Initiate a Start condition to the Slave device.
* @param None
* @retval None
*/
void Handle_I2C_Master(void)
{
/* (1) Prepare acknowledge for Master data reception ************************/
LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_ACK);
/* (2) Initiate a Start condition to the Slave device ***********************/
/* Master Generate Start condition */
LL_I2C_GenerateStartCondition(I2C1);
}
/**
* @brief System Clock Configuration
* The system Clock is configured as follow :
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 72000000
* HCLK(Hz) = 72000000
* AHB Prescaler = 1
* APB1 Prescaler = 2
* APB2 Prescaler = 1
* HSE Frequency(Hz) = 8000000
* PLLMUL = 9
* Flash Latency(WS) = 2
* @param None
* @retval None
*/
void SystemClock_Config(void)
{
/* Set FLASH latency */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
/* Enable HSE oscillator */
LL_RCC_HSE_EnableBypass();
LL_RCC_HSE_Enable();
while(LL_RCC_HSE_IsReady() != 1)
{
};
/* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
LL_RCC_PLL_Enable();
while(LL_RCC_PLL_IsReady() != 1)
{
};
/* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
};
/* Set APB1 & APB2 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
/* Set systick to 1ms in using frequency set to 72MHz */
LL_Init1msTick(72000000);
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(72000000);
}/******************************************************************************/
/* IRQ HANDLER TREATMENT Functions */
/******************************************************************************/
/**
* @brief Function to manage User push-button
* @param None
* @retval None
*/
void UserButton_Callback(void)
{
/* Update User push-button variable : to be checked in waiting loop in main program */
ubButtonPress = 1;
}
/**
* @brief Function called from I2C IRQ Handler when TXE flag is set
* Function is in charge of transmit a byte on I2C lines.
* @param None
* @retval None
*/
void Slave_Ready_To_Transmit_Callback(void)
{
/* Update ubNbDataToTransmit variable */
ubNbDataToTransmit--;
if(ubNbDataToTransmit == 0)
{
/* Disable Buffer Interrupts */
LL_I2C_DisableIT_BUF(I2C2);
}
/* Send the Byte requested by the Master */
LL_I2C_TransmitData8(I2C2, SLAVE_BYTE_TO_SEND);
}
/**
* @brief Function called from I2C IRQ Handler when RXNE flag is set
* Function is in charge of reading byte received on I2C lines.
* @param None
* @retval None
*/
void Master_Reception_Callback(void)
{
if(ubNbDataToReceive > 3)
{
/* Read character in Receive Data register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
/* Update ubNbDataToReceive variable */
ubNbDataToReceive--;
}
else if((ubNbDataToReceive == 2) || (ubNbDataToReceive == 3))
{
/* Disable Buffer Interrupts */
LL_I2C_DisableIT_BUF(I2C1);
}
else if(ubNbDataToReceive == 1)
{
/* Disable Buffer Interrupts */
LL_I2C_DisableIT_BUF(I2C1);
/* Generate Stop condition */
LL_I2C_GenerateStopCondition(I2C1);
/* Read character in Receive Data register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
/* Update ubNbDataToReceive variable */
ubNbDataToReceive--;
/* Call function Master Complete Callback */
Master_Complete_Callback();
}
}
/**
* @brief Function called from Slave I2C IRQ Handler when STOP condition is detected
* Function is in charge of disabling interrupts.
* @param None
* @retval None
*/
void Slave_Complete_Callback(void)
{
/* (1) Disable I2C2 transfer event/error interrupts:
* - Disable Events Interrupt
* - Disable Error interrupts
*/
LL_I2C_DisableIT_EVT(I2C2);
LL_I2C_DisableIT_ERR(I2C2);
}
/**
* @brief Function called from I2C IRQ Handler when STOP flag is set
* Function is in charge of checking data received,
* LED2 is On if data are correct.
* @param None
* @retval None
*/
void Master_Complete_Callback(void)
{
if(ubNbDataToReceive == 3)
{
/* Prepare the generation of a Non ACKnowledge condition after next received bytes */
LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_NACK);
/* Read character in Receive Data register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
ubNbDataToReceive--;
/* Disable Buffer Interrupts */
LL_I2C_DisableIT_BUF(I2C1);
}
else if(ubNbDataToReceive == 2)
{
/* Generate Stop condition */
LL_I2C_GenerateStopCondition(I2C1);
/* Read character from Receive Data register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
ubNbDataToReceive--;
/* Read character from shift register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
ubNbDataToReceive--;
}
else
{
if(ubNbDataToReceive > 0)
{
/* Read character from shift register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C2);
/* Update ubNbDataToReceive variable */
ubNbDataToReceive--;
}
}
if(ubNbDataToReceive == 0)
{
/* (1) Disable I2C1 transfer event/error interrupts:
* - Disable Events Interrupt
* - Disable Error interrupts
*/
LL_I2C_DisableIT_EVT(I2C1);
LL_I2C_DisableIT_ERR(I2C1);
/* Read Received character.
RXNE flag is cleared by reading of RXDR register */
if(aReceiveBuffer[ubReceiveIndex-1] == SLAVE_BYTE_TO_SEND)
{
/* Turn LED2 On:
* - Expected byte has been received
* - Master Rx sequence completed successfully
*/
LED_On();
}
else
{
/* Call Error function */
Error_Callback();
}
}
}
/**
* @brief Function called in case of error detected in I2C IT Handler
* @param None
* @retval None
*/
void Error_Callback(void)
{
/* Disable I2C2_EV_IRQn and I2C1_EV_IRQn */
NVIC_DisableIRQ(I2C2_EV_IRQn);
NVIC_DisableIRQ(I2C1_EV_IRQn);
/* Disable I2C2_ER_IRQn and I2C1_ER_IRQn */
NVIC_DisableIRQ(I2C2_ER_IRQn);
NVIC_DisableIRQ(I2C1_ER_IRQn);
/* Unexpected event : Set LED2 to Blinking mode to indicate error occurs */
LED_Blinking(LED_BLINK_ERROR);
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT\Src\stm32f1xx_it.c | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_Communication_IT/Src/stm32f1xx_it.c
* @author MCD Application Team
* @brief Main Interrupt Service Routines.
* This file provides template for all exceptions handler and
* peripherals interrupt service routine.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_it.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup I2C_OneBoard_Communication_IT
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
extern __IO uint8_t ubNbDataToTransmit;
extern __IO uint8_t ubNbDataToReceive;
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
/**
* @brief This function handles PendSVC exception.
* @param None
* @retval None
*/
void PendSV_Handler(void)
{
}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
void SysTick_Handler(void)
{
}
/******************************************************************************/
/* STM32F1xx Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @brief This function handles external lines 10 to 15 interrupt request.
* @param None
* @retval None
*/
void USER_BUTTON_IRQHANDLER(void)
{
/* Manage Flags */
if(LL_EXTI_IsActiveFlag_0_31(USER_BUTTON_EXTI_LINE) != RESET)
{
LL_EXTI_ClearFlag_0_31(USER_BUTTON_EXTI_LINE);
/* Manage code in main.c.*/
UserButton_Callback();
}
}
/**
* Brief This function handles I2C2 (Slave) event interrupt request.
* Param None
* Retval None
*/
void I2C2_EV_IRQHandler(void)
{
/* Check ADDR flag value in ISR register */
if(LL_I2C_IsActiveFlag_ADDR(I2C2))
{
/* Verify the slave transfer direction, a write direction, Slave enters transmitter mode */
if(LL_I2C_GetTransferDirection(I2C2) == LL_I2C_DIRECTION_WRITE)
{
/* Enable Buffer Interrupts */
LL_I2C_EnableIT_BUF(I2C2);
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C2);
}
else
{
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C2);
/* Call Error function */
Error_Callback();
}
}
/* Check TXE flag value in ISR register */
else if(LL_I2C_IsActiveFlag_TXE(I2C2))
{
/* Call function Slave Ready to Transmit Callback */
Slave_Ready_To_Transmit_Callback();
}
/* Check BTF flag value in ISR register */
else if(LL_I2C_IsActiveFlag_BTF(I2C2))
{
/* Send the next byte */
/* Call function Slave Ready to Transmit Callback */
Slave_Ready_To_Transmit_Callback();
}
}
/**
* Brief This function handles I2C2 (Slave) error interrupt request.
* Param None
* Retval None
*/
void I2C2_ER_IRQHandler(void)
{
/* Normal use case, if all bytes are sent and Acknowledge failure appears */
/* This correspond to the end of communication */
if((ubNbDataToTransmit == 0) && (LL_I2C_IsActiveFlag_AF(I2C2)))
{
/* Clear AF flag value in ISR register */
LL_I2C_ClearFlag_AF(I2C2);
/* Call function Slave Complete Callback */
Slave_Complete_Callback();
}
else
{
/* Call Error function */
Error_Callback();
}
}
/**
* Brief This function handles I2C1 (Master) interrupt request.
* Param None
* Retval None
*/
void I2C1_EV_IRQHandler(void)
{
/* Check SB flag value in ISR register */
if(LL_I2C_IsActiveFlag_SB(I2C1))
{
/* Send Slave address with a 7-Bit SLAVE_OWN_ADDRESS for a read request */
LL_I2C_TransmitData8(I2C1, SLAVE_OWN_ADDRESS | I2C_REQUEST_READ);
}
/* Check ADDR flag value in ISR register */
else if(LL_I2C_IsActiveFlag_ADDR(I2C1))
{
if(ubNbDataToReceive == 1)
{
/* Prepare the generation of a Non ACKnowledge condition after next received byte */
LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_NACK);
/* Enable Buffer Interrupts */
LL_I2C_EnableIT_BUF(I2C1);
}
else if(ubNbDataToReceive == 2)
{
/* Prepare the generation of a Non ACKnowledge condition after next received byte */
LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_NACK);
/* Enable Pos */
LL_I2C_EnableBitPOS(I2C1);
}
else
{
/* Enable Buffer Interrupts */
LL_I2C_EnableIT_BUF(I2C1);
}
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C1);
}
/* Check BTF flag value in ISR register */
else if(LL_I2C_IsActiveFlag_BTF(I2C1))
{
/* Call function Master Complete Callback */
Master_Complete_Callback();
}
/* Check RXNE flag value in ISR register */
else if(LL_I2C_IsActiveFlag_RXNE(I2C1))
{
/* Call function Master Reception Callback */
Master_Reception_Callback();
}
}
/**
* Brief This function handles I2C1 (Master) error interrupt request.
* Param None
* Retval None
*/
void I2C1_ER_IRQHandler(void)
{
/* Call Error function */
Error_Callback();
}
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT\Src\system_stm32f1xx.c | /**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC->CFGR &= 0xF8FF0000U;
#else
RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull = ( pllmull >> 18U) + 2U;
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
#endif
}
#else
pllmull = pllmull >> 18U;
if (pllmull != 0x0DU)
{
pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
pllmull = 13U / 2U;
}
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
else
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
#endif /* STM32F105xC */
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
(void)(tmpreg);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD->CRL = 0x44BB44BBU;
GPIOD->CRH = 0xBBBBBBBBU;
GPIOE->CRL = 0xB44444BBU;
GPIOE->CRH = 0xBBBBBBBBU;
GPIOF->CRL = 0x44BBBBBBU;
GPIOF->CRH = 0xBBBB4444U;
GPIOG->CRL = 0x44BBBBBBU;
GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1->BTCR[4U] = 0x00001091U;
FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT_Init\Inc\main.h | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/Inc/main.h
* @author MCD Application Team
* @brief Header for main.c module
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_ll_bus.h"
#include "stm32f1xx_ll_rcc.h"
#include "stm32f1xx_ll_system.h"
#include "stm32f1xx_ll_utils.h"
#include "stm32f1xx_ll_gpio.h"
#include "stm32f1xx_ll_exti.h"
#include "stm32f1xx_ll_i2c.h"
#include "stm32f1xx_ll_pwr.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/**
* @brief LED2
*/
#define LED2_PIN LL_GPIO_PIN_5
#define LED2_GPIO_PORT GPIOA
#define LED2_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA)
/**
* @brief Toggle periods for various blinking modes
*/
#define LED_BLINK_FAST 200
#define LED_BLINK_SLOW 500
#define LED_BLINK_ERROR 1000
/**
* @brief Key push-button
*/
#define USER_BUTTON_PIN LL_GPIO_PIN_13
#define USER_BUTTON_GPIO_PORT GPIOC
#define USER_BUTTON_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOC)
#define USER_BUTTON_EXTI_LINE LL_EXTI_LINE_13
#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
#define USER_BUTTON_EXTI_LINE_ENABLE() LL_EXTI_EnableIT_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_EXTI_FALLING_TRIG_ENABLE() LL_EXTI_EnableFallingTrig_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_SYSCFG_SET_EXTI() do { \
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO); \
LL_GPIO_AF_SetEXTISource(LL_GPIO_AF_EXTI_PORTC, LL_GPIO_AF_EXTI_LINE13); \
} while(0)
#define USER_BUTTON_IRQHANDLER EXTI15_10_IRQHandler
/**
* @brief Slave settings
*/
#define SLAVE_OWN_ADDRESS 0x5A /* This value is a left shift of a real 7 bits of a slave address
value which can find in a Datasheet as example: b0101101
mean in uint8_t equivalent at 0x2D and this value can be
seen in the OAR1 register in bits ADD[1:7] */
/**
* @brief Master Transfer Request Direction
*/
#define I2C_REQUEST_WRITE 0x00
#define I2C_REQUEST_READ 0x01
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
/* IRQ Handler treatment functions */
void UserButton_Callback(void);
void Slave_Ready_To_Transmit_Callback(void);
void Slave_Complete_Callback(void);
void Master_Reception_Callback(void);
void Master_Complete_Callback(void);
void Error_Callback(void);
#endif /* __MAIN_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT_Init\Inc\stm32f1xx_it.h | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/Inc/stm32f1xx_it.h
* @author MCD Application Team
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_IT_H
#define __STM32F1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void USER_BUTTON_IRQHANDLER(void);
void I2C2_EV_IRQHandler(void);
void I2C2_ER_IRQHandler(void);
void I2C1_EV_IRQHandler(void);
void I2C1_ER_IRQHandler(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F1xx_IT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT_Init\Inc\stm32_assert.h | /**
******************************************************************************
* @file stm32_assert.h
* @author MCD Application Team
* @brief STM32 assert template file.
* This file should be copied to the application folder and renamed
* to stm32_assert.h.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_ASSERT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT_Init\Src\main.c | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/Src/main.c
* @author MCD Application Team
* @brief This example describes how to send/receive bytes over I2C IP using
* the STM32F1xx I2C LL API.
* Peripheral initialization done using LL initialization function.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup I2C_OneBoard_Communication_IT_Init
* @{
*/
/* Private typedef -----------------------------------------------------------*/
LL_I2C_InitTypeDef i2c_initstruct;
/* Private define ------------------------------------------------------------*/
/**
* @brief I2C devices settings
*/
/* I2C SPEEDCLOCK define to max value: 400 KHz */
#define I2C_SPEEDCLOCK 400000
#define I2C_DUTYCYCLE LL_I2C_DUTYCYCLE_2
/**
* @brief Define related to SlaveTransmit process
*/
#define SLAVE_BYTE_TO_SEND (uint8_t)0xA5
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
__IO uint8_t ubNbDataToTransmit = sizeof(SLAVE_BYTE_TO_SEND);
__IO uint8_t ubNbDataToReceive = sizeof(SLAVE_BYTE_TO_SEND);
__IO uint8_t ubButtonPress = 0;
/**
* @brief Variables related to MasterReceive process
*/
uint8_t aReceiveBuffer[0xF] = {0};
__IO uint8_t ubReceiveIndex = 0;
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void Configure_I2C_Slave(void);
void Configure_I2C_Master(void);
void Activate_I2C_Slave(void);
void Activate_I2C_Master(void);
void LED_Init(void);
void LED_On(void);
void LED_Off(void);
void LED_Blinking(uint32_t Period);
void WaitForUserButtonPress(void);
void Handle_I2C_Slave(void);
void Handle_I2C_Master(void);
void UserButton_Init(void);
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/* Configure the system clock to 72 MHz */
SystemClock_Config();
/* Initialize LED2 */
LED_Init();
/* Set LED2 Off */
LED_Off();
/* Initialize User push-button in EXTI mode */
UserButton_Init();
/* Configure I2C2 (I2C IP configuration in Slave mode and related GPIO initialization) */
Configure_I2C_Slave();
/* Configure I2C1 (I2C IP configuration in Master mode and related GPIO initialization) */
Configure_I2C_Master();
/* Enable the I2C2 peripheral (Slave) */
Activate_I2C_Slave();
/* Enable the I2C1 peripheral (Master) */
Activate_I2C_Master();
/* Wait for User push-button press to start transfer */
WaitForUserButtonPress();
/* Handle I2C2 events (Slave) */
Handle_I2C_Slave();
/* Handle I2C1 events (Master) */
Handle_I2C_Master();
/* Infinite loop */
while (1)
{
}
}
/**
* @brief This function configures I2C2 in Slave mode.
* @note This function is used to :
* -1- Enables GPIO clock.
* -2- Enable the I2C2 peripheral clock and configures the I2C2 pins.
* -3- Configure NVIC for I2C2.
* -4- Configure and Enable I2C2 functional parameters.
* -5- Disable I2C2 (to prevent misplaced start/stop condition during
* GPIO initialization phase on Master side).
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_I2C_Slave(void)
{
/* (1) Enables GPIO clock */
/* Enable the peripheral clock of GPIOB */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
/* (2) Enable the I2C2 peripheral clock *************************************/
/* Enable the peripheral clock for I2C2 */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C2);
/* Configure SCL Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_10, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_10, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_10, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_10, LL_GPIO_PULL_UP);
/* Configure SDA Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_11, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_11, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_11, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_11, LL_GPIO_PULL_UP);
/* (3) Configure NVIC for I2C2 **********************************************/
/* Configure Event IT:
* - Set priority for I2C2_EV_IRQn
* - Enable I2C2_EV_IRQn
*/
NVIC_SetPriority(I2C2_EV_IRQn, 0);
NVIC_EnableIRQ(I2C2_EV_IRQn);
/* Configure Error IT:
* - Set priority for I2C2_ER_IRQn
* - Enable I2C2_ER_IRQn
*/
NVIC_SetPriority(I2C2_ER_IRQn, 0);
NVIC_EnableIRQ(I2C2_ER_IRQn);
/* (4) Configure I2C2 functional parameters ***********************/
/* Reset I2C2 data registers */
if (LL_I2C_DeInit(I2C2) != SUCCESS)
{
/* Initialization Error */
LED_Blinking(LED_BLINK_ERROR);
}
/* Enable Clock stretching */
/* Reset Value is Clock stretching enabled */
//LL_I2C_EnableClockStretching(I2C2);
/* Enable General Call */
/* Reset Value is General Call disabled */
//LL_I2C_EnableGeneralCall(I2C2);
/* Configure the 7bits Own Address2 */
/* Reset Values of :
* - OwnAddress2 is 0x00
* - Own Address2 is disabled
*/
//LL_I2C_SetOwnAddress2(I2C2, 0x00);
//LL_I2C_DisableOwnAddress2(I2C2);
/* Enable Peripheral in I2C mode */
/* Reset Value is I2C mode */
//LL_I2C_SetMode(I2C2, LL_I2C_MODE_I2C);
/* Set fields of initialization structure:
* - Peripheral Mode = Mode I2C
* - Clock Speed = fast Mode @400kHz
* - Duty Cycle = fast mode duty cycle tlow/thigh = 2
* - Own Address1 = SLAVE_OWN_ADDRESS
* - Type of Acknowledge = Acknowledge bytes/address received
* - Own Address 1 Size = Slave Address in 7-bit
*/
i2c_initstruct.PeripheralMode = LL_I2C_MODE_I2C;
i2c_initstruct.ClockSpeed = I2C_SPEEDCLOCK;
i2c_initstruct.DutyCycle = I2C_DUTYCYCLE;
i2c_initstruct.OwnAddress1 = SLAVE_OWN_ADDRESS;
i2c_initstruct.TypeAcknowledge = LL_I2C_ACK;
i2c_initstruct.OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
/* Initialize I2C instance according to parameters defined in initialization structure. */
if (LL_I2C_Init(I2C2, &i2c_initstruct) != SUCCESS)
{
/* Initialization Error */
LED_Blinking(LED_BLINK_ERROR);
}
/* Disable I2C2 (to prevent misplaced start/stop condition during
* GPIO initialization phase on Master side)
*/
LL_I2C_Disable(I2C2);
}
/**
* @brief This function configures I2C1 in Master mode.
* @note This function is used to :
* -1- Enables GPIO clock.
* -2- Enable the I2C1 peripheral clock and configures the I2C1 pins.
* -3- Configure NVIC for I2C1.
* -4- Configure and Enable I2C1 functional parameters.
* -5- Disable I2C1 (to prevent misplaced start/stop condition during
* GPIO initialization phase on Slave side).
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_I2C_Master(void)
{
/* (1) Enables GPIO clock **********************/
/* Enable the peripheral clock of GPIOB */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
/* (2) Enable the I2C1 peripheral clock *************************************/
/* Enable the peripheral clock for I2C1 */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1);
/* Configure SCL Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_6, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_6, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_6, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_6, LL_GPIO_PULL_UP);
/* Configure SDA Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_7, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_7, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_7, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_7, LL_GPIO_PULL_UP);
/* (3) Configure NVIC for I2C1 **********************************************/
/* Configure Event IT:
* - Set priority for I2C1_EV_IRQn
* - Enable I2C1_EV_IRQn
*/
NVIC_SetPriority(I2C1_EV_IRQn, 0);
NVIC_EnableIRQ(I2C1_EV_IRQn);
/* Configure Error IT:
* - Set priority for I2C1_ER_IRQn
* - Enable I2C1_ER_IRQn
*/
NVIC_SetPriority(I2C1_ER_IRQn, 0);
NVIC_EnableIRQ(I2C1_ER_IRQn);
/* (4) Configure I2C1 functional parameters ********************************/
/* Reset I2C1 data registers */
if (LL_I2C_DeInit(I2C1) != SUCCESS)
{
/* Initialization Error */
LED_Blinking(LED_BLINK_ERROR);
}
/* Configure the Own Address1 */
/* Reset Values of :
* - OwnAddress1 is 0x00
* - OwnAddrSize is LL_I2C_OWNADDRESS1_7BIT
*/
//LL_I2C_SetOwnAddress1(I2C1, 0x00, LL_I2C_OWNADDRESS1_7BIT);
/* Enable Clock stretching */
/* Reset Value is Clock stretching enabled */
//LL_I2C_EnableClockStretching(I2C1);
/* Enable General Call */
/* Reset Value is General Call disabled */
//LL_I2C_EnableGeneralCall(I2C1);
/* Configure the 7bits Own Address2 */
/* Reset Values of :
* - OwnAddress2 is 0x00
* - Own Address2 is disabled
*/
//LL_I2C_SetOwnAddress2(I2C1, 0x00);
//LL_I2C_DisableOwnAddress2(I2C1);
/* Enable Peripheral in I2C mode */
/* Reset Value is I2C mode */
//LL_I2C_SetMode(I2C1, LL_I2C_MODE_I2C);
/* Set fields of initialization structure:
* - Peripheral Mode = Mode I2C
* - Clock Speed = fast Mode @400kHz
* - Duty Cycle = fast mode duty cycle tlow/thigh = 2
* - Own Address1 = SLAVE_OWN_ADDRESS
* - Type of Acknowledge = Acknowledge bytes/address received
* - Own Address 1 Size = Slave Address in 7-bit
*/
i2c_initstruct.PeripheralMode = LL_I2C_MODE_I2C;
i2c_initstruct.ClockSpeed = I2C_SPEEDCLOCK;
i2c_initstruct.DutyCycle = I2C_DUTYCYCLE;
i2c_initstruct.OwnAddress1 = 0x00;
i2c_initstruct.TypeAcknowledge = LL_I2C_ACK;
i2c_initstruct.OwnAddrSize = LL_I2C_OWNADDRESS1_7BIT;
/* Initialize I2C instance according to parameters defined in initialization structure. */
if (LL_I2C_Init(I2C1, &i2c_initstruct) != SUCCESS)
{
/* Initialization Error */
LED_Blinking(LED_BLINK_ERROR);
}
/* Disable I2C1 (to prevent misplaced start/stop condition during
* GPIO initialization phase on Master side)
*/
LL_I2C_Disable(I2C1);
}
/**
* @brief This function Activate I2C2 peripheral (Slave)
* @note This function is used to :
* -1- Enable I2C2.
* -2- Enable I2C2 transfer event/error interrupts.
* @param None
* @retval None
*/
void Activate_I2C_Slave(void)
{
/* (1) Enable I2C2 **********************************************************/
LL_I2C_Enable(I2C2);
/* (2) Enable I2C2 transfer event/error interrupts:
* - Enable Events interrupts
* - Enable Errors interrupts
*/
LL_I2C_EnableIT_EVT(I2C2);
LL_I2C_EnableIT_ERR(I2C2);
}
/**
* @brief This function Activate I2C1 peripheral (Master)
* @note This function is used to :
* -1- Enable I2C1.
* -2- Enable I2C1 transfer event/error interrupts.
* @param None
* @retval None
*/
void Activate_I2C_Master(void)
{
/* (1) Enable I2C1 **********************************************************/
LL_I2C_Enable(I2C1);
/* (2) Enable I2C1 transfer event/error interrupts:
* - Enable Events interrupts
* - Enable Errors interrupts
*/
LL_I2C_EnableIT_EVT(I2C1);
LL_I2C_EnableIT_ERR(I2C1);
}
/**
* @brief Initialize LED2.
* @param None
* @retval None
*/
void LED_Init(void)
{
/* Enable the LED2 Clock */
LED2_GPIO_CLK_ENABLE();
/* Configure IO in output push-pull mode to drive external LED2 */
LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
/* Reset value is LL_GPIO_OUTPUT_PUSHPULL */
//LL_GPIO_SetPinOutputType(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_OUTPUT_PUSHPULL);
/* Reset value is LL_GPIO_SPEED_FREQ_LOW */
//LL_GPIO_SetPinSpeed(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_SPEED_FREQ_LOW);
/* Reset value is LL_GPIO_PULL_NO */
//LL_GPIO_SetPinPull(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_PULL_NO);
}
/**
* @brief Turn-on LED2.
* @param None
* @retval None
*/
void LED_On(void)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Turn-off LED2.
* @param None
* @retval None
*/
void LED_Off(void)
{
/* Turn LED2 off */
LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Set LED2 to Blinking mode for an infinite loop (toggle period based on value provided as input parameter).
* @param Period : Period of time (in ms) between each toggling of LED
* This parameter can be user defined values. Pre-defined values used in that example are :
* @arg LED_BLINK_FAST : Fast Blinking
* @arg LED_BLINK_SLOW : Slow Blinking
* @arg LED_BLINK_ERROR : Error specific Blinking
* @retval None
*/
void LED_Blinking(uint32_t Period)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
/* Toggle IO in an infinite loop */
while (1)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(Period);
}
}
/**
* @brief Configures User push-button in GPIO or EXTI Line Mode.
* @param None
* @retval None
*/
void UserButton_Init(void)
{
/* Enable the BUTTON Clock */
USER_BUTTON_GPIO_CLK_ENABLE();
/* Configure GPIO for BUTTON */
LL_GPIO_SetPinMode(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_MODE_INPUT);
/* Connect External Line to the GPIO*/
USER_BUTTON_SYSCFG_SET_EXTI();
/* Enable a rising trigger External line 13 Interrupt */
USER_BUTTON_EXTI_LINE_ENABLE();
USER_BUTTON_EXTI_FALLING_TRIG_ENABLE();
/* Configure NVIC for USER_BUTTON_EXTI_IRQn */
NVIC_EnableIRQ(USER_BUTTON_EXTI_IRQn);
NVIC_SetPriority(USER_BUTTON_EXTI_IRQn,0x03);
}
/**
* @brief Wait for User push-button press to start transfer.
* @param None
* @retval None
*/
/* */
void WaitForUserButtonPress(void)
{
while (ubButtonPress == 0)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(LED_BLINK_FAST);
}
/* Turn LED2 off */
LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief This Function handle Slave events to perform a transmission process
* @note This function is composed in one step :
* -1- Prepare acknowledge for Slave address reception.
* @param None
* @retval None
*/
void Handle_I2C_Slave(void)
{
/* (1) Prepare acknowledge for Slave address reception **********************/
LL_I2C_AcknowledgeNextData(I2C2, LL_I2C_ACK);
}
/**
* @brief This Function handle Master events to perform a reception process
* @note This function is composed in different steps :
* -1- Prepare acknowledge for Master data reception.
* -2- Initiate a Start condition to the Slave device.
* @param None
* @retval None
*/
void Handle_I2C_Master(void)
{
/* (1) Prepare acknowledge for Master data reception ************************/
LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_ACK);
/* (2) Initiate a Start condition to the Slave device ***********************/
/* Master Generate Start condition */
LL_I2C_GenerateStartCondition(I2C1);
}
/**
* @brief System Clock Configuration
* The system Clock is configured as follow :
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 72000000
* HCLK(Hz) = 72000000
* AHB Prescaler = 1
* APB1 Prescaler = 2
* APB2 Prescaler = 1
* HSE Frequency(Hz) = 8000000
* PLLMUL = 9
* Flash Latency(WS) = 2
* @param None
* @retval None
*/
void SystemClock_Config(void)
{
/* Set FLASH latency */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
/* Enable HSE oscillator */
LL_RCC_HSE_EnableBypass();
LL_RCC_HSE_Enable();
while(LL_RCC_HSE_IsReady() != 1)
{
};
/* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
LL_RCC_PLL_Enable();
while(LL_RCC_PLL_IsReady() != 1)
{
};
/* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
};
/* Set APB1 & APB2 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
/* Set systick to 1ms in using frequency set to 72MHz */
LL_Init1msTick(72000000);
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(72000000);
}/******************************************************************************/
/* IRQ HANDLER TREATMENT Functions */
/******************************************************************************/
/**
* @brief Function to manage User push-button
* @param None
* @retval None
*/
void UserButton_Callback(void)
{
/* Update User push-button variable : to be checked in waiting loop in main program */
ubButtonPress = 1;
}
/**
* @brief Function called from I2C IRQ Handler when TXE flag is set
* Function is in charge of transmit a byte on I2C lines.
* @param None
* @retval None
*/
void Slave_Ready_To_Transmit_Callback(void)
{
/* Update ubNbDataToTransmit variable */
ubNbDataToTransmit--;
if(ubNbDataToTransmit == 0)
{
/* Disable Buffer Interrupts */
LL_I2C_DisableIT_BUF(I2C2);
}
/* Send the Byte requested by the Master */
LL_I2C_TransmitData8(I2C2, SLAVE_BYTE_TO_SEND);
}
/**
* @brief Function called from I2C IRQ Handler when RXNE flag is set
* Function is in charge of reading byte received on I2C lines.
* @param None
* @retval None
*/
void Master_Reception_Callback(void)
{
if(ubNbDataToReceive > 3)
{
/* Read character in Receive Data register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
/* Update ubNbDataToReceive variable */
ubNbDataToReceive--;
}
else if((ubNbDataToReceive == 2) || (ubNbDataToReceive == 3))
{
/* Disable Buffer Interrupts */
LL_I2C_DisableIT_BUF(I2C1);
}
else if(ubNbDataToReceive == 1)
{
/* Disable Buffer Interrupts */
LL_I2C_DisableIT_BUF(I2C1);
/* Generate Stop condition */
LL_I2C_GenerateStopCondition(I2C1);
/* Read character in Receive Data register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
/* Update ubNbDataToReceive variable */
ubNbDataToReceive--;
/* Call function Master Complete Callback */
Master_Complete_Callback();
}
}
/**
* @brief Function called from Slave I2C IRQ Handler when STOP condition is detected
* Function is in charge of disabling interrupts.
* @param None
* @retval None
*/
void Slave_Complete_Callback(void)
{
/* (1) Disable I2C2 transfer event/error interrupts:
* - Disable Events Interrupt
* - Disable Error interrupts
*/
LL_I2C_DisableIT_EVT(I2C2);
LL_I2C_DisableIT_ERR(I2C2);
}
/**
* @brief Function called from I2C IRQ Handler when STOP flag is set
* Function is in charge of checking data received,
* LED2 is On if data are correct.
* @param None
* @retval None
*/
void Master_Complete_Callback(void)
{
if(ubNbDataToReceive == 3)
{
/* Prepare the generation of a Non ACKnowledge condition after next received bytes */
LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_NACK);
/* Read character in Receive Data register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
ubNbDataToReceive--;
/* Disable Buffer Interrupts */
LL_I2C_DisableIT_BUF(I2C1);
}
else if(ubNbDataToReceive == 2)
{
/* Generate Stop condition */
LL_I2C_GenerateStopCondition(I2C1);
/* Read character from Receive Data register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
ubNbDataToReceive--;
/* Read character from shift register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
ubNbDataToReceive--;
}
else
{
if(ubNbDataToReceive > 0)
{
/* Read character from shift register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C2);
/* Update ubNbDataToReceive variable */
ubNbDataToReceive--;
}
}
if(ubNbDataToReceive == 0)
{
/* (1) Disable I2C1 transfer event/error interrupts:
* - Disable Events Interrupt
* - Disable Error interrupts
*/
LL_I2C_DisableIT_EVT(I2C1);
LL_I2C_DisableIT_ERR(I2C1);
/* Read Received character.
RXNE flag is cleared by reading of RXDR register */
if(aReceiveBuffer[ubReceiveIndex-1] == SLAVE_BYTE_TO_SEND)
{
/* Turn LED2 On:
* - Expected byte has been received
* - Master Rx sequence completed successfully
*/
LED_On();
}
else
{
/* Call Error function */
Error_Callback();
}
}
}
/**
* @brief Function called in case of error detected in I2C IT Handler
* @param None
* @retval None
*/
void Error_Callback(void)
{
/* Disable I2C2_EV_IRQn and I2C1_EV_IRQn */
NVIC_DisableIRQ(I2C2_EV_IRQn);
NVIC_DisableIRQ(I2C1_EV_IRQn);
/* Disable I2C2_ER_IRQn and I2C1_ER_IRQn */
NVIC_DisableIRQ(I2C2_ER_IRQn);
NVIC_DisableIRQ(I2C1_ER_IRQn);
/* Unexpected event : Set LED2 to Blinking mode to indicate error occurs */
LED_Blinking(LED_BLINK_ERROR);
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT_Init\Src\stm32f1xx_it.c | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_Communication_IT_Init/Src/stm32f1xx_it.c
* @author MCD Application Team
* @brief Main Interrupt Service Routines.
* This file provides template for all exceptions handler and
* peripherals interrupt service routine.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_it.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup I2C_OneBoard_Communication_IT_Init
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
extern __IO uint8_t ubNbDataToTransmit;
extern __IO uint8_t ubNbDataToReceive;
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
/**
* @brief This function handles PendSVC exception.
* @param None
* @retval None
*/
void PendSV_Handler(void)
{
}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
void SysTick_Handler(void)
{
}
/******************************************************************************/
/* STM32F1xx Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @brief This function handles external lines 10 to 15 interrupt request.
* @param None
* @retval None
*/
void USER_BUTTON_IRQHANDLER(void)
{
/* Manage Flags */
if(LL_EXTI_IsActiveFlag_0_31(USER_BUTTON_EXTI_LINE) != RESET)
{
LL_EXTI_ClearFlag_0_31(USER_BUTTON_EXTI_LINE);
/* Manage code in main.c.*/
UserButton_Callback();
}
}
/**
* Brief This function handles I2C2 (Slave) event interrupt request.
* Param None
* Retval None
*/
void I2C2_EV_IRQHandler(void)
{
/* Check ADDR flag value in ISR register */
if(LL_I2C_IsActiveFlag_ADDR(I2C2))
{
/* Verify the slave transfer direction, a write direction, Slave enters transmitter mode */
if(LL_I2C_GetTransferDirection(I2C2) == LL_I2C_DIRECTION_WRITE)
{
/* Enable Buffer Interrupts */
LL_I2C_EnableIT_BUF(I2C2);
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C2);
}
else
{
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C2);
/* Call Error function */
Error_Callback();
}
}
/* Check TXE flag value in ISR register */
else if(LL_I2C_IsActiveFlag_TXE(I2C2))
{
/* Call function Slave Ready to Transmit Callback */
Slave_Ready_To_Transmit_Callback();
}
/* Check BTF flag value in ISR register */
else if(LL_I2C_IsActiveFlag_BTF(I2C2))
{
/* Send the next byte */
/* Call function Slave Ready to Transmit Callback */
Slave_Ready_To_Transmit_Callback();
}
}
/**
* Brief This function handles I2C2 (Slave) error interrupt request.
* Param None
* Retval None
*/
void I2C2_ER_IRQHandler(void)
{
/* Normal use case, if all bytes are sent and Acknowledge failure appears */
/* This correspond to the end of communication */
if((ubNbDataToTransmit == 0) && (LL_I2C_IsActiveFlag_AF(I2C2)))
{
/* Clear AF flag value in ISR register */
LL_I2C_ClearFlag_AF(I2C2);
/* Call function Slave Complete Callback */
Slave_Complete_Callback();
}
else
{
/* Call Error function */
Error_Callback();
}
}
/**
* Brief This function handles I2C1 (Master) interrupt request.
* Param None
* Retval None
*/
void I2C1_EV_IRQHandler(void)
{
/* Check SB flag value in ISR register */
if(LL_I2C_IsActiveFlag_SB(I2C1))
{
/* Send Slave address with a 7-Bit SLAVE_OWN_ADDRESS for a read request */
LL_I2C_TransmitData8(I2C1, SLAVE_OWN_ADDRESS | I2C_REQUEST_READ);
}
/* Check ADDR flag value in ISR register */
else if(LL_I2C_IsActiveFlag_ADDR(I2C1))
{
if(ubNbDataToReceive == 1)
{
/* Prepare the generation of a Non ACKnowledge condition after next received byte */
LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_NACK);
/* Enable Buffer Interrupts */
LL_I2C_EnableIT_BUF(I2C1);
}
else if(ubNbDataToReceive == 2)
{
/* Prepare the generation of a Non ACKnowledge condition after next received byte */
LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_NACK);
/* Enable Pos */
LL_I2C_EnableBitPOS(I2C1);
}
else
{
/* Enable Buffer Interrupts */
LL_I2C_EnableIT_BUF(I2C1);
}
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C1);
}
/* Check BTF flag value in ISR register */
else if(LL_I2C_IsActiveFlag_BTF(I2C1))
{
/* Call function Master Complete Callback */
Master_Complete_Callback();
}
/* Check RXNE flag value in ISR register */
else if(LL_I2C_IsActiveFlag_RXNE(I2C1))
{
/* Call function Master Reception Callback */
Master_Reception_Callback();
}
}
/**
* Brief This function handles I2C1 (Master) error interrupt request.
* Param None
* Retval None
*/
void I2C1_ER_IRQHandler(void)
{
/* Call Error function */
Error_Callback();
}
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT_Init | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_IT_Init\Src\system_stm32f1xx.c | /**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC->CFGR &= 0xF8FF0000U;
#else
RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull = ( pllmull >> 18U) + 2U;
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
#endif
}
#else
pllmull = pllmull >> 18U;
if (pllmull != 0x0DU)
{
pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
pllmull = 13U / 2U;
}
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
else
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
#endif /* STM32F105xC */
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
(void)(tmpreg);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD->CRL = 0x44BB44BBU;
GPIOD->CRH = 0xBBBBBBBBU;
GPIOE->CRL = 0xB44444BBU;
GPIOE->CRH = 0xBBBBBBBBU;
GPIOF->CRL = 0x44BBBBBBU;
GPIOF->CRH = 0xBBBB4444U;
GPIOG->CRL = 0x44BBBBBBU;
GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1->BTCR[4U] = 0x00001091U;
FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_PollingAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_PollingAndIT\Inc\main.h | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT/Inc/main.h
* @author MCD Application Team
* @brief Header for main.c module
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_ll_bus.h"
#include "stm32f1xx_ll_rcc.h"
#include "stm32f1xx_ll_system.h"
#include "stm32f1xx_ll_utils.h"
#include "stm32f1xx_ll_cortex.h"
#include "stm32f1xx_ll_gpio.h"
#include "stm32f1xx_ll_exti.h"
#include "stm32f1xx_ll_i2c.h"
#include "stm32f1xx_ll_pwr.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Define used to enable time-out management*/
#define USE_TIMEOUT 0
/**
* @brief LED2
*/
#define LED2_PIN LL_GPIO_PIN_5
#define LED2_GPIO_PORT GPIOA
#define LED2_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA)
/**
* @brief Toggle periods for various blinking modes
*/
#define LED_BLINK_FAST 200
#define LED_BLINK_SLOW 500
#define LED_BLINK_ERROR 1000
/**
* @brief Key push-button
*/
#define USER_BUTTON_PIN LL_GPIO_PIN_13
#define USER_BUTTON_GPIO_PORT GPIOC
#define USER_BUTTON_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOC)
#define USER_BUTTON_EXTI_LINE LL_EXTI_LINE_13
#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
#define USER_BUTTON_EXTI_LINE_ENABLE() LL_EXTI_EnableIT_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_EXTI_FALLING_TRIG_ENABLE() LL_EXTI_EnableFallingTrig_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_SYSCFG_SET_EXTI() do { \
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO); \
LL_GPIO_AF_SetEXTISource(LL_GPIO_AF_EXTI_PORTC, LL_GPIO_AF_EXTI_LINE13); \
} while(0)
#define USER_BUTTON_IRQHANDLER EXTI15_10_IRQHandler
/**
* @brief Slave settings
*/
#define SLAVE_OWN_ADDRESS 0x5A /* This value is a left shift of a real 7 bits of a slave address
value which can find in a Datasheet as example: b0101101
mean in uint8_t equivalent at 0x2D and this value can be
seen in the OAR1 register in bits ADD[1:7] */
/**
* @brief Master Transfer Request Direction
*/
#define I2C_REQUEST_WRITE 0x00
#define I2C_REQUEST_READ 0x01
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
/* IRQ Handler treatment functions */
void Slave_Reception_Callback(void);
void Slave_Complete_Callback(void);
void UserButton_Callback(void);
void Error_Callback(void);
#endif /* __MAIN_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_PollingAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_PollingAndIT\Inc\stm32f1xx_it.h | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT/Inc/stm32f1xx_it.h
* @author MCD Application Team
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_IT_H
#define __STM32F1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void USER_BUTTON_IRQHANDLER(void);
void I2C2_EV_IRQHandler(void);
void I2C2_ER_IRQHandler(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F1xx_IT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_PollingAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_PollingAndIT\Inc\stm32_assert.h | /**
******************************************************************************
* @file stm32_assert.h
* @author MCD Application Team
* @brief STM32 assert template file.
* This file should be copied to the application folder and renamed
* to stm32_assert.h.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_ASSERT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_PollingAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_PollingAndIT\Src\main.c | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT/Src/main.c
* @author MCD Application Team
* @brief This example describes how to send/receive bytes over I2C IP using
* the STM32F1xx I2C LL API.
* Peripheral initialization done using LL unitary services functions.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup I2C_OneBoard_Communication_PollingAndIT
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/**
* @brief Timeout value
*/
#if (USE_TIMEOUT == 1)
#define I2C_SEND_TIMEOUT_TXE_MS 5
#define I2C_SEND_TIMEOUT_SB_MS 5
#define I2C_SEND_TIMEOUT_ADDR_MS 5
#endif /* USE_TIMEOUT */
/**
* @brief I2C devices settings
*/
/* I2C SPEEDCLOCK define to max value: 400 KHz */
#define I2C_SPEEDCLOCK 400000
#define I2C_DUTYCYCLE LL_I2C_DUTYCYCLE_2
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
#if (USE_TIMEOUT == 1)
uint32_t Timeout = 0; /* Variable used for Timeout management */
#endif /* USE_TIMEOUT */
__IO uint8_t ubButtonPress = 0;
const uint8_t aLedOn[] = "LED ON";
/**
* @brief Variables related to SlaveReceive process
*/
uint8_t aReceiveBuffer[0xF] = {0};
__IO uint8_t ubReceiveIndex = 0;
/**
* @brief Variables related to MasterTransmit process
*/
__IO uint8_t ubNbDataToTransmit = sizeof(aLedOn);
uint8_t* pTransmitBuffer = (uint8_t*)aLedOn;
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void Configure_I2C_Slave(void);
void Configure_I2C_Master(void);
void Activate_I2C_Slave(void);
void Activate_I2C_Master(void);
uint8_t Buffercmp8(uint8_t* pBuffer1, uint8_t* pBuffer2, uint8_t BufferLength);
void LED_Init(void);
void LED_On(void);
void LED_Off(void);
void LED_Blinking(uint32_t Period);
void WaitForUserButtonPress(void);
void Handle_I2C_Slave(void);
void Handle_I2C_Master(void);
void UserButton_Init(void);
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/* Configure the system clock to 72 MHz */
SystemClock_Config();
/* Initialize LED2 */
LED_Init();
/* Set LED2 Off */
LED_Off();
/* Initialize User push-button in EXTI mode */
UserButton_Init();
/* Configure I2C2 (I2C IP configuration in Slave mode and related GPIO initialization) */
Configure_I2C_Slave();
/* Configure I2C1 (I2C IP configuration in Master mode and related GPIO initialization) */
Configure_I2C_Master();
/* Enable the I2C2 peripheral (Slave) */
Activate_I2C_Slave();
/* Enable the I2C1 peripheral (Master) */
Activate_I2C_Master();
/* Wait for User push-button press to start transfer */
WaitForUserButtonPress();
/* Handle I2C2 events (Slave) */
Handle_I2C_Slave();
/* Handle I2C1 events (Master) */
Handle_I2C_Master();
/* Infinite loop */
while (1)
{
}
}
/**
* @brief This function configures I2C2 in Slave mode.
* @note This function is used to :
* -1- Enables GPIO clock.
* -2- Enable the I2C2 peripheral clock and configures the I2C2 pins.
* -3- Configure NVIC for I2C2.
* -4- Configure I2C2 functional parameters.
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_I2C_Slave(void)
{
/* (1) Enables GPIO clock */
/* Enable the peripheral clock of GPIOB */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
/* (2) Enable the I2C2 peripheral clock *************************************/
/* Enable the peripheral clock for I2C2 */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C2);
/* Configure SCL Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_10, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_10, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_10, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_10, LL_GPIO_PULL_UP);
/* Configure SDA Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_11, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_11, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_11, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_11, LL_GPIO_PULL_UP);
/* (3) Configure NVIC for I2C2 **********************************************/
/* Configure Event IT:
* - Set priority for I2C2_EV_IRQn
* - Enable I2C2_EV_IRQn
*/
NVIC_SetPriority(I2C2_EV_IRQn, 0);
NVIC_EnableIRQ(I2C2_EV_IRQn);
/* Configure Error IT:
* - Set priority for I2C2_ER_IRQn
* - Enable I2C2_ER_IRQn
*/
NVIC_SetPriority(I2C2_ER_IRQn, 0);
NVIC_EnableIRQ(I2C2_ER_IRQn);
/* (4) Configure I2C2 functional parameters ***********************/
/* Disable I2C2 prior modifying configuration registers */
LL_I2C_Disable(I2C2);
/* Configure the Own Address1 :
* - OwnAddress1 is SLAVE_OWN_ADDRESS
* - OwnAddrSize is LL_I2C_OWNADDRESS1_7BIT
*/
LL_I2C_SetOwnAddress1(I2C2, SLAVE_OWN_ADDRESS, LL_I2C_OWNADDRESS1_7BIT);
/* Enable Clock stretching */
/* Reset Value is Clock stretching enabled */
//LL_I2C_EnableClockStretching(I2C2);
/* Enable General Call */
/* Reset Value is General Call disabled */
//LL_I2C_EnableGeneralCall(I2C2);
/* Configure the 7bits Own Address2 */
/* Reset Values of :
* - OwnAddress2 is 0x00
* - Own Address2 is disabled
*/
//LL_I2C_SetOwnAddress2(I2C2, 0x00);
//LL_I2C_DisableOwnAddress2(I2C2);
/* Enable Peripheral in I2C mode */
/* Reset Value is I2C mode */
//LL_I2C_SetMode(I2C2, LL_I2C_MODE_I2C);
}
/**
* @brief This function configures I2C1 in Master mode.
* @note This function is used to :
* -1- Enables GPIO clock.
* -2- Enable the I2C1 peripheral clock and configures the I2C1 pins.
* -3- Configure I2C1 functional parameters.
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_I2C_Master(void)
{
LL_RCC_ClocksTypeDef rcc_clocks;
/* (1) Enables GPIO clock **********************/
/* Enable the peripheral clock of GPIOB */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
/* (2) Enable the I2C1 peripheral clock *************************************/
/* Enable the peripheral clock for I2C1 */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1);
/* Configure SCL Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_6, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_6, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_6, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_6, LL_GPIO_PULL_UP);
/* Configure SDA Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_7, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_7, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_7, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_7, LL_GPIO_PULL_UP);
/* (3) Configure I2C1 functional parameters ********************************/
/* Disable I2C1 prior modifying configuration registers */
LL_I2C_Disable(I2C1);
/* Retrieve Clock frequencies */
LL_RCC_GetSystemClocksFreq(&rcc_clocks);
/* Configure the SCL Clock Speed */
LL_I2C_ConfigSpeed(I2C1, rcc_clocks.PCLK1_Frequency, I2C_SPEEDCLOCK, I2C_DUTYCYCLE);
/* Configure the Own Address1 */
/* Reset Values of :
* - OwnAddress1 is 0x00
* - OwnAddrSize is LL_I2C_OWNADDRESS1_7BIT
*/
//LL_I2C_SetOwnAddress1(I2C1, 0x00, LL_I2C_OWNADDRESS1_7BIT);
/* Enable Clock stretching */
/* Reset Value is Clock stretching enabled */
//LL_I2C_EnableClockStretching(I2C1);
/* Enable General Call */
/* Reset Value is General Call disabled */
//LL_I2C_EnableGeneralCall(I2C1);
/* Configure the 7bits Own Address2 */
/* Reset Values of :
* - OwnAddress2 is 0x00
* - Own Address2 is disabled
*/
//LL_I2C_SetOwnAddress2(I2C1, 0x00);
//LL_I2C_DisableOwnAddress2(I2C1);
/* Enable Peripheral in I2C mode */
/* Reset Value is I2C mode */
//LL_I2C_SetMode(I2C1, LL_I2C_MODE_I2C);
}
/**
* @brief This function Activate I2C2 peripheral (Slave)
* @note This function is used to :
* -1- Enable I2C2.
* -2- Enable I2C2 transfer event/error interrupts.
* @param None
* @retval None
*/
void Activate_I2C_Slave(void)
{
/* (1) Enable I2C2 **********************************************************/
LL_I2C_Enable(I2C2);
/* (2) Enable I2C2 transfer event/error interrupts:
* - Enable Events interrupts
* - Enable Errors interrupts
*/
LL_I2C_EnableIT_EVT(I2C2);
LL_I2C_EnableIT_ERR(I2C2);
}
/**
* @brief This function Activate I2C1 peripheral (Master)
* @note This function is used to :
* -1- Enable I2C1.
* @param None
* @retval None
*/
void Activate_I2C_Master(void)
{
/* (1) Enable I2C1 **********************************************************/
LL_I2C_Enable(I2C1);
}
/**
* @brief Compares two 8-bit buffers and returns the comparison result.
* @param pBuffer1: pointer to the source buffer to be compared to.
* @param pBuffer2: pointer to the second source buffer to be compared to the first.
* @param BufferLength: buffer's length.
* @retval 0: Comparison is OK (the two Buffers are identical)
* Value different from 0: Comparison is NOK (Buffers are different)
*/
uint8_t Buffercmp8(uint8_t* pBuffer1, uint8_t* pBuffer2, uint8_t BufferLength)
{
while (BufferLength--)
{
if (*pBuffer1 != *pBuffer2)
{
return 1;
}
pBuffer1++;
pBuffer2++;
}
return 0;
}
/**
* @brief Initialize LED2.
* @param None
* @retval None
*/
void LED_Init(void)
{
/* Enable the LED2 Clock */
LED2_GPIO_CLK_ENABLE();
/* Configure IO in output push-pull mode to drive external LED2 */
LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
/* Reset value is LL_GPIO_OUTPUT_PUSHPULL */
//LL_GPIO_SetPinOutputType(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_OUTPUT_PUSHPULL);
/* Reset value is LL_GPIO_SPEED_FREQ_LOW */
//LL_GPIO_SetPinSpeed(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_SPEED_FREQ_LOW);
/* Reset value is LL_GPIO_PULL_NO */
//LL_GPIO_SetPinPull(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_PULL_NO);
}
/**
* @brief Turn-on LED2.
* @param None
* @retval None
*/
void LED_On(void)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Turn-off LED2.
* @param None
* @retval None
*/
void LED_Off(void)
{
/* Turn LED2 off */
LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Set LED2 to Blinking mode for an infinite loop (toggle period based on value provided as input parameter).
* @param Period : Period of time (in ms) between each toggling of LED
* This parameter can be user defined values. Pre-defined values used in that example are :
* @arg LED_BLINK_FAST : Fast Blinking
* @arg LED_BLINK_SLOW : Slow Blinking
* @arg LED_BLINK_ERROR : Error specific Blinking
* @retval None
*/
void LED_Blinking(uint32_t Period)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
/* Toggle IO in an infinite loop */
while (1)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(Period);
}
}
/**
* @brief Configures User push-button in GPIO or EXTI Line Mode.
* @param None
* @retval None
*/
void UserButton_Init(void)
{
/* Enable the BUTTON Clock */
USER_BUTTON_GPIO_CLK_ENABLE();
/* Configure GPIO for BUTTON */
LL_GPIO_SetPinMode(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_MODE_INPUT);
/* Connect External Line to the GPIO*/
USER_BUTTON_SYSCFG_SET_EXTI();
/* Enable a rising trigger External line 13 Interrupt */
USER_BUTTON_EXTI_LINE_ENABLE();
USER_BUTTON_EXTI_FALLING_TRIG_ENABLE();
/* Configure NVIC for USER_BUTTON_EXTI_IRQn */
NVIC_EnableIRQ(USER_BUTTON_EXTI_IRQn);
NVIC_SetPriority(USER_BUTTON_EXTI_IRQn, 0x03);
}
/**
* @brief Wait for User push-button press to start transfer.
* @param None
* @retval None
*/
/* */
void WaitForUserButtonPress(void)
{
while (ubButtonPress == 0)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(LED_BLINK_FAST);
}
/* Turn LED2 off */
LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief This Function handle Slave events to perform a transmission process
* @note This function is composed in one step :
* -1- Prepare acknowledge for Slave address reception.
* @param None
* @retval None
*/
void Handle_I2C_Slave(void)
{
/* (1) Prepare acknowledge for Slave address reception **********************/
LL_I2C_AcknowledgeNextData(I2C2, LL_I2C_ACK);
}
/**
* @brief This Function handle Master events to perform a transmission process
* @note This function is composed in different steps :
* -1- Prepare acknowledge for Master data reception.
* -2- Initiate a Start condition to the Slave device.
* -3- Loop until Start Bit transmitted (SB flag raised).
* -4- Send Slave address with a 7-Bit SLAVE_OWN_ADDRESS for a write request.
* -5- Loop until Address Acknowledgement received (ADDR flag raised).
* -6- Clear ADDR flag and loop until end of transfer (ubNbDataToTransmit == 0).
* -6.1 Transmit data (TXE flag raised).
* -7- End of transfer, Data consistency are checking into Slave process.
* @param None
* @retval None
*/
void Handle_I2C_Master(void)
{
/* (1) Prepare acknowledge for Master data reception ************************/
LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_ACK);
/* (2) Initiate a Start condition to the Slave device ***********************/
/* Master Generate Start condition */
LL_I2C_GenerateStartCondition(I2C1);
/* (3) Loop until Start Bit transmitted (SB flag raised) ********************/
#if (USE_TIMEOUT == 1)
Timeout = I2C_SEND_TIMEOUT_SB_MS;
#endif /* USE_TIMEOUT */
/* Loop until SB flag is raised */
while(!LL_I2C_IsActiveFlag_SB(I2C1))
{
#if (USE_TIMEOUT == 1)
/* Check Systick counter flag to decrement the time-out value */
if (LL_SYSTICK_IsActiveCounterFlag())
{
if(Timeout-- == 0)
{
/* Time-out occurred. Set LED2 to blinking mode */
LED_Blinking(LED_BLINK_SLOW);
}
}
#endif /* USE_TIMEOUT */
}
/* (4) Send Slave address with a 7-Bit SLAVE_OWN_ADDRESS for a write request */
LL_I2C_TransmitData8(I2C1, SLAVE_OWN_ADDRESS | I2C_REQUEST_WRITE);
/* (5) Loop until Address Acknowledgement received (ADDR flag raised) *******/
#if (USE_TIMEOUT == 1)
Timeout = I2C_SEND_TIMEOUT_ADDR_MS;
#endif /* USE_TIMEOUT */
/* Loop until ADDR flag is raised */
while(!LL_I2C_IsActiveFlag_ADDR(I2C1))
{
#if (USE_TIMEOUT == 1)
/* Check Systick counter flag to decrement the time-out value */
if (LL_SYSTICK_IsActiveCounterFlag())
{
if(Timeout-- == 0)
{
/* Time-out occurred. Set LED2 to blinking mode */
LED_Blinking(LED_BLINK_SLOW);
}
}
#endif /* USE_TIMEOUT */
}
/* (6) Clear ADDR flag and loop until end of transfer (ubNbDataToTransmit == 0) */
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C1);
#if (USE_TIMEOUT == 1)
Timeout = I2C_SEND_TIMEOUT_TXE_MS;
#endif /* USE_TIMEOUT */
/* Loop until TXE flag is raised */
while(ubNbDataToTransmit > 0)
{
/* (6.1) Transmit data (TXE flag raised) **********************************/
/* Check TXE flag value in ISR register */
if(LL_I2C_IsActiveFlag_TXE(I2C1))
{
/* Write data in Transmit Data register.
TXE flag is cleared by writing data in TXDR register */
LL_I2C_TransmitData8(I2C1, (*pTransmitBuffer++));
ubNbDataToTransmit--;
#if (USE_TIMEOUT == 1)
Timeout = I2C_SEND_TIMEOUT_TXE_MS;
#endif /* USE_TIMEOUT */
}
#if (USE_TIMEOUT == 1)
/* Check Systick counter flag to decrement the time-out value */
if (LL_SYSTICK_IsActiveCounterFlag())
{
if(Timeout-- == 0)
{
/* Time-out occurred. Set LED2 to blinking mode */
LED_Blinking(LED_BLINK_SLOW);
}
}
#endif /* USE_TIMEOUT */
}
/* (7) End of transfer, Data consistency are checking into Slave process *****/
/* Generate Stop condition */
LL_I2C_GenerateStopCondition(I2C1);
}
/**
* @brief System Clock Configuration
* The system Clock is configured as follow :
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 72000000
* HCLK(Hz) = 72000000
* AHB Prescaler = 1
* APB1 Prescaler = 2
* APB2 Prescaler = 1
* HSE Frequency(Hz) = 8000000
* PLLMUL = 9
* Flash Latency(WS) = 2
* @param None
* @retval None
*/
void SystemClock_Config(void)
{
/* Set FLASH latency */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
/* Enable HSE oscillator */
LL_RCC_HSE_EnableBypass();
LL_RCC_HSE_Enable();
while(LL_RCC_HSE_IsReady() != 1)
{
};
/* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
LL_RCC_PLL_Enable();
while(LL_RCC_PLL_IsReady() != 1)
{
};
/* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
};
/* Set APB1 & APB2 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
/* Set systick to 1ms in using frequency set to 72MHz */
LL_Init1msTick(72000000);
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(72000000);
}/******************************************************************************/
/* IRQ HANDLER TREATMENT Functions */
/******************************************************************************/
/**
* @brief Function to manage User push-button
* @param None
* @retval None
*/
void UserButton_Callback(void)
{
/* Update User push-button variable : to be checked in waiting loop in main program */
ubButtonPress = 1;
}
/**
* @brief Function called from I2C IRQ Handler when RXNE flag is set
* Function is in charge of retrieving received byte on I2C lines.
* @param None
* @retval None
*/
void Slave_Reception_Callback(void)
{
/* Read character in Receive Data register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C2);
}
/**
* @brief Function called from I2C IRQ Handler when STOP flag is set
* Function is in charge of checking data received,
* LED2 is On if data are correct.
* @param None
* @retval None
*/
void Slave_Complete_Callback(void)
{
/* Check if data request to turn on the LED2 */
if(Buffercmp8((uint8_t*)aReceiveBuffer, (uint8_t*)aLedOn, (ubReceiveIndex-1)) == 0)
{
/* Turn LED2 On */
/* Expected bytes have been received */
/* Slave Rx sequence completed successfully*/
LED_On();
}
else
{
/* Call Error function */
Error_Callback();
}
}
/**
* @brief Function called in case of error detected in I2C IT Handler
* @param None
* @retval None
*/
void Error_Callback(void)
{
/* Disable I2C2_EV_IRQn */
NVIC_DisableIRQ(I2C2_EV_IRQn);
/* Disable I2C2_ER_IRQn */
NVIC_DisableIRQ(I2C2_ER_IRQn);
/* Unexpected event : Set LED2 to Blinking mode to indicate error occurs */
LED_Blinking(LED_BLINK_ERROR);
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_PollingAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_PollingAndIT\Src\stm32f1xx_it.c | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_OneBoard_Communication_PollingAndIT/Src/stm32f1xx_it.c
* @author MCD Application Team
* @brief Main Interrupt Service Routines.
* This file provides template for all exceptions handler and
* peripherals interrupt service routine.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_it.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup I2C_OneBoard_Communication_PollingAndIT
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
/**
* @brief This function handles PendSVC exception.
* @param None
* @retval None
*/
void PendSV_Handler(void)
{
}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
void SysTick_Handler(void)
{
}
/******************************************************************************/
/* STM32F1xx Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @brief This function handles external lines 10 to 15 interrupt request.
* @param None
* @retval None
*/
void USER_BUTTON_IRQHANDLER(void)
{
/* Manage Flags */
if(LL_EXTI_IsActiveFlag_0_31(USER_BUTTON_EXTI_LINE) != RESET)
{
LL_EXTI_ClearFlag_0_31(USER_BUTTON_EXTI_LINE);
/* Manage code in main.c.*/
UserButton_Callback();
}
}
/**
* Brief This function handles I2C2 (Slave) event interrupt request.
* Param None
* Retval None
*/
void I2C2_EV_IRQHandler(void)
{
/* Check ADDR flag value in ISR register */
if(LL_I2C_IsActiveFlag_ADDR(I2C2))
{
/* Verify the slave transfer direction, a read direction, Slave enters receiver mode */
if(LL_I2C_GetTransferDirection(I2C2) == LL_I2C_DIRECTION_READ)
{
/* Enable Buffer Interrupts */
LL_I2C_EnableIT_BUF(I2C2);
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C2);
}
else
{
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C2);
/* Call Error function */
Error_Callback();
}
}
/* Check RXNE flag value in ISR register */
else if(LL_I2C_IsActiveFlag_RXNE(I2C2))
{
/* Call function Slave Reception Callback */
Slave_Reception_Callback();
}
/* Check BTF flag value in ISR register */
else if(LL_I2C_IsActiveFlag_BTF(I2C2))
{
/* Call function Slave Reception Callback */
Slave_Reception_Callback();
}
/* Check STOP flag value in ISR register */
else if(LL_I2C_IsActiveFlag_STOP(I2C2))
{
/* Clear STOP flag value in ISR register */
LL_I2C_ClearFlag_STOP(I2C2);
/* Call function Slave Complete Callback */
Slave_Complete_Callback();
}
}
/**
* Brief This function handles I2C2 (Slave) error interrupt request.
* Param None
* Retval None
*/
void I2C2_ER_IRQHandler(void)
{
/* Call Error function */
Error_Callback();
}
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_PollingAndIT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_OneBoard_Communication_PollingAndIT\Src\system_stm32f1xx.c | /**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC->CFGR &= 0xF8FF0000U;
#else
RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull = ( pllmull >> 18U) + 2U;
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
#endif
}
#else
pllmull = pllmull >> 18U;
if (pllmull != 0x0DU)
{
pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
pllmull = 13U / 2U;
}
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
else
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
#endif /* STM32F105xC */
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
(void)(tmpreg);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD->CRL = 0x44BB44BBU;
GPIOD->CRH = 0xBBBBBBBBU;
GPIOE->CRL = 0xB44444BBU;
GPIOE->CRH = 0xBBBBBBBBU;
GPIOF->CRL = 0x44BBBBBBU;
GPIOF->CRH = 0xBBBB4444U;
GPIOG->CRL = 0x44BBBBBBU;
GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1->BTCR[4U] = 0x00001091U;
FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterRx_SlaveTx_IT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterRx_SlaveTx_IT\Inc\main.h | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT/Inc/main.h
* @author MCD Application Team
* @brief Header for main.c module
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_ll_bus.h"
#include "stm32f1xx_ll_rcc.h"
#include "stm32f1xx_ll_system.h"
#include "stm32f1xx_ll_utils.h"
#include "stm32f1xx_ll_gpio.h"
#include "stm32f1xx_ll_exti.h"
#include "stm32f1xx_ll_i2c.h"
#include "stm32f1xx_ll_pwr.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/**
* @brief LED2
*/
#define LED2_PIN LL_GPIO_PIN_5
#define LED2_GPIO_PORT GPIOA
#define LED2_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA)
/**
* @brief Toggle periods for various blinking modes
*/
#define LED_BLINK_FAST 200
#define LED_BLINK_SLOW 500
#define LED_BLINK_ERROR 1000
/**
* @brief Key push-button
*/
#define USER_BUTTON_PIN LL_GPIO_PIN_13
#define USER_BUTTON_GPIO_PORT GPIOC
#define USER_BUTTON_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOC)
#define USER_BUTTON_EXTI_LINE LL_EXTI_LINE_13
#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
#define USER_BUTTON_EXTI_LINE_ENABLE() LL_EXTI_EnableIT_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_EXTI_FALLING_TRIG_ENABLE() LL_EXTI_EnableFallingTrig_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_SYSCFG_SET_EXTI() do { \
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO); \
LL_GPIO_AF_SetEXTISource(LL_GPIO_AF_EXTI_PORTC, LL_GPIO_AF_EXTI_LINE13); \
} while(0)
#define USER_BUTTON_IRQHANDLER EXTI15_10_IRQHandler
/**
* @brief Slave settings
*/
#define SLAVE_OWN_ADDRESS 0x5A /* This value is a left shift of a real 7 bits of a slave address
value which can find in a Datasheet as example: b0101101
mean in uint8_t equivalent at 0x2D and this value can be
seen in the OAR1 register in bits ADD[1:7] */
/**
* @brief Master Transfer Request Direction
*/
#define I2C_REQUEST_WRITE 0x00
#define I2C_REQUEST_READ 0x01
/* Uncomment this line to use the board as slave, if not it is used as master */
//#define SLAVE_BOARD
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
/* IRQ Handler treatment functions */
#ifdef SLAVE_BOARD
void Slave_Ready_To_Transmit_Callback(void);
void Slave_Complete_Callback(void);
#else /* MASTER_BOARD */
void Master_Reception_Callback(void);
void Master_Complete_Callback(void);
#endif /* SLAVE_BOARD */
void UserButton_Callback(void);
void Error_Callback(void);
#endif /* __MAIN_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterRx_SlaveTx_IT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterRx_SlaveTx_IT\Inc\stm32f1xx_it.h | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT/Inc/stm32f1xx_it.h
* @author MCD Application Team
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_IT_H
#define __STM32F1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void USER_BUTTON_IRQHANDLER(void);
#ifdef SLAVE_BOARD
void I2C1_EV_IRQHandler(void);
void I2C1_ER_IRQHandler(void);
#else
void I2C1_EV_IRQHandler(void);
void I2C1_ER_IRQHandler(void);
#endif /* SLAVE_BOARD */
#ifdef __cplusplus
}
#endif
#endif /* __STM32F1xx_IT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterRx_SlaveTx_IT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterRx_SlaveTx_IT\Inc\stm32_assert.h | /**
******************************************************************************
* @file stm32_assert.h
* @author MCD Application Team
* @brief STM32 assert template file.
* This file should be copied to the application folder and renamed
* to stm32_assert.h.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_ASSERT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterRx_SlaveTx_IT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterRx_SlaveTx_IT\Src\main.c | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT/Src/main.c
* @author MCD Application Team
* @brief This example describes how to send/receive bytes over I2C IP using
* the STM32F1xx I2C LL API.
* Peripheral initialization done using LL unitary services functions.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup I2C_TwoBoards_MasterRx_SlaveTx_IT
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/**
* @brief I2C devices settings
*/
/* I2C SPEEDCLOCK define to max value: Fast Mode @400kHz */
#define I2C_SPEEDCLOCK 400000
#define I2C_DUTYCYCLE LL_I2C_DUTYCYCLE_2
/**
* @brief Define related to SlaveTransmit process
*/
#define SLAVE_BYTE_TO_SEND (uint8_t)0xA5
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
#ifndef SLAVE_BOARD
/**
* @brief Variables related to MasterReceive process
*/
uint8_t aReceiveBuffer[0xF] = {0};
__IO uint8_t ubReceiveIndex = 0;
#endif /* SLAVE_BOARD */
/**
* @brief Variables related to MasterReceive and SlaveTransmit process
*/
__IO uint8_t ubButtonPress = 0;
__IO uint8_t ubNbDataToTransmit = sizeof(SLAVE_BYTE_TO_SEND);
__IO uint8_t ubNbDataToReceive = sizeof(SLAVE_BYTE_TO_SEND);
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void LED_Init(void);
void LED_On(void);
void LED_Off(void);
void LED_Blinking(uint32_t Period);
void UserButton_Init(void);
void WaitForUserButtonPress(void);
#ifdef SLAVE_BOARD
void Configure_I2C_Slave(void);
void Activate_I2C_Slave(void);
void Handle_I2C_Slave(void);
#else /* MASTER_BOARD */
void Configure_I2C_Master(void);
void Activate_I2C_Master(void);
void Handle_I2C_Master(void);
#endif /* SLAVE_BOARD */
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/* Configure the system clock to 72 MHz */
SystemClock_Config();
/* Initialize LED2 */
LED_Init();
/* Set LED2 Off */
LED_Off();
/* Initialize User push-button in EXTI mode */
UserButton_Init();
#ifdef SLAVE_BOARD
/* Configure I2C1 (I2C IP configuration in Slave mode and related GPIO initialization) */
Configure_I2C_Slave();
/* Wait for User push-button press to start transfer */
WaitForUserButtonPress();
/* Enable the I2C1 peripheral (Slave) */
Activate_I2C_Slave();
/* Handle I2C1 events (Slave) */
Handle_I2C_Slave();
#else /* MASTER_BOARD */
/* Configure I2C1 (I2C IP configuration in Master mode and related GPIO initialization) */
Configure_I2C_Master();
/* Wait for User push-button press to start transfer */
WaitForUserButtonPress();
/* Enable the I2C1 peripheral (Master) */
Activate_I2C_Master();
/* Handle I2C1 events (Master) */
Handle_I2C_Master();
#endif /* SLAVE_BOARD */
/* Infinite loop */
while (1)
{
}
}
#ifdef SLAVE_BOARD
/**
* @brief This function configures I2C1 in Slave mode.
* @note This function is used to :
* -1- Enables GPIO clock.
* -2- Enable the I2C1 peripheral clock and configures the I2C1 pins.
* -3- Configure NVIC for I2C1.
* -4- Configure I2C1 functional parameters.
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_I2C_Slave(void)
{
/* (1) Enables GPIO clock */
/* Enable the peripheral clock of GPIOB */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
/* (2) Enable the I2C1 peripheral clock *************************************/
/* Enable the peripheral clock for I2C1 */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1);
/* Configure SCL Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_6, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_6, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_6, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_6, LL_GPIO_PULL_UP);
/* Configure SDA Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_7, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_7, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_7, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_7, LL_GPIO_PULL_UP);
/* (3) Configure NVIC for I2C1 **********************************************/
/* Configure Event IT:
* - Set priority for I2C1_EV_IRQn
* - Enable I2C1_EV_IRQn
*/
NVIC_SetPriority(I2C1_EV_IRQn, 0);
NVIC_EnableIRQ(I2C1_EV_IRQn);
/* Configure Error IT:
* - Set priority for I2C1_ER_IRQn
* - Enable I2C1_ER_IRQn
*/
NVIC_SetPriority(I2C1_ER_IRQn, 0);
NVIC_EnableIRQ(I2C1_ER_IRQn);
/* (4) Configure I2C1 functional parameters ***********************/
/* Disable I2C1 prior modifying configuration registers */
LL_I2C_Disable(I2C1);
/* Configure the Own Address1 :
* - OwnAddress1 is SLAVE_OWN_ADDRESS
* - OwnAddrSize is LL_I2C_OWNADDRESS1_7BIT
*/
LL_I2C_SetOwnAddress1(I2C1, SLAVE_OWN_ADDRESS, LL_I2C_OWNADDRESS1_7BIT);
/* Enable Clock stretching */
/* Reset Value is Clock stretching enabled */
//LL_I2C_EnableClockStretching(I2C1);
/* Enable General Call */
/* Reset Value is General Call disabled */
//LL_I2C_EnableGeneralCall(I2C1);
/* Configure the 7bits Own Address2 */
/* Reset Values of :
* - OwnAddress2 is 0x00
* - Own Address2 is disabled
*/
//LL_I2C_SetOwnAddress2(I2C1, 0x00);
//LL_I2C_DisableOwnAddress2(I2C1);
/* Enable Peripheral in I2C mode */
/* Reset Value is I2C mode */
//LL_I2C_SetMode(I2C1, LL_I2C_MODE_I2C);
}
/**
* @brief This function Activate I2C1 peripheral (Slave)
* @note This function is used to :
* -1- Enable I2C1.
* -2- Enable I2C1 transfer event/error interrupts.
* @param None
* @retval None
*/
void Activate_I2C_Slave(void)
{
/* (1) Enable I2C1 **********************************************************/
LL_I2C_Enable(I2C1);
/* (2) Enable I2C1 transfer event/error interrupts:
* - Enable Events Interrupt
* - Enable Error interrupts
*/
LL_I2C_EnableIT_EVT(I2C1);
LL_I2C_EnableIT_ERR(I2C1);
}
#else /* MASTER_BOARD */
/**
* @brief This function configures I2C1 in Master mode.
* @note This function is used to :
* -1- Enables GPIO clock.
* -2- Enable the I2C1 peripheral clock and configures the I2C1 pins.
* -3- Configure NVIC for I2C1.
* -4- Configure I2C1 functional parameters.
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_I2C_Master(void)
{
LL_RCC_ClocksTypeDef rcc_clocks;
/* (1) Enables GPIO clock **********************/
/* Enable the peripheral clock of GPIOB */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
/* (2) Enable the I2C1 peripheral clock *************************************/
/* Enable the peripheral clock for I2C1 */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1);
/* Configure SCL Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_6, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_6, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_6, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_6, LL_GPIO_PULL_UP);
/* Configure SDA Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_7, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_7, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_7, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_7, LL_GPIO_PULL_UP);
/* (3) Configure NVIC for I2C1 **********************************************/
/* Configure Event IT:
* - Set priority for I2C1_EV_IRQn
* - Enable I2C1_EV_IRQn
*/
NVIC_SetPriority(I2C1_EV_IRQn, 0);
NVIC_EnableIRQ(I2C1_EV_IRQn);
/* Configure Error IT:
* - Set priority for I2C1_ER_IRQn
* - Enable I2C1_ER_IRQn
*/
NVIC_SetPriority(I2C1_ER_IRQn, 0);
NVIC_EnableIRQ(I2C1_ER_IRQn);
/* (4) Configure I2C1 functional parameters ********************************/
/* Disable I2C1 prior modifying configuration registers */
LL_I2C_Disable(I2C1);
/* Retrieve Clock frequencies */
LL_RCC_GetSystemClocksFreq(&rcc_clocks);
/* Configure the SCL Clock Speed */
LL_I2C_ConfigSpeed(I2C1, rcc_clocks.PCLK1_Frequency, I2C_SPEEDCLOCK, I2C_DUTYCYCLE);
/* Configure the Own Address1 */
/* Reset Values of :
* - OwnAddress1 is 0x00
* - OwnAddrSize is LL_I2C_OWNADDRESS1_7BIT
*/
//LL_I2C_SetOwnAddress1(I2C1, 0x00, LL_I2C_OWNADDRESS1_7BIT);
/* Enable Clock stretching */
/* Reset Value is Clock stretching enabled */
//LL_I2C_EnableClockStretching(I2C1);
/* Enable General Call */
/* Reset Value is General Call disabled */
//LL_I2C_EnableGeneralCall(I2C1);
/* Configure the 7bits Own Address2 */
/* Reset Values of :
* - OwnAddress2 is 0x00
* - Own Address2 is disabled
*/
//LL_I2C_SetOwnAddress2(I2C1, 0x00);
//LL_I2C_DisableOwnAddress2(I2C1);
/* Enable Peripheral in I2C mode */
/* Reset Value is I2C mode */
//LL_I2C_SetMode(I2C1, LL_I2C_MODE_I2C);
}
/**
* @brief This function Activate I2C1 peripheral (Master)
* @note This function is used to :
* -1- Enable I2C1.
* -2- Enable I2C1 transfer event/error interrupts.
* @param None
* @retval None
*/
void Activate_I2C_Master(void)
{
/* (1) Enable I2C1 **********************************************************/
LL_I2C_Enable(I2C1);
/* (2) Enable I2C1 transfer event/error interrupts:
* - Enable Events interrupts
* - Enable Errors interrupts
*/
LL_I2C_EnableIT_EVT(I2C1);
LL_I2C_EnableIT_ERR(I2C1);
}
#endif /* SLAVE_BOARD */
/**
* @brief Initialize LED2.
* @param None
* @retval None
*/
void LED_Init(void)
{
/* Enable the LED2 Clock */
LED2_GPIO_CLK_ENABLE();
/* Configure IO in output push-pull mode to drive external LED2 */
LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
/* Reset value is LL_GPIO_OUTPUT_PUSHPULL */
//LL_GPIO_SetPinOutputType(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_OUTPUT_PUSHPULL);
/* Reset value is LL_GPIO_SPEED_FREQ_LOW */
//LL_GPIO_SetPinSpeed(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_SPEED_FREQ_LOW);
/* Reset value is LL_GPIO_PULL_NO */
//LL_GPIO_SetPinPull(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_PULL_NO);
}
/**
* @brief Turn-on LED2.
* @param None
* @retval None
*/
void LED_On(void)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Turn-off LED2.
* @param None
* @retval None
*/
void LED_Off(void)
{
/* Turn LED2 off */
LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Set LED2 to Blinking mode for an infinite loop (toggle period based on value provided as input parameter).
* @param Period : Period of time (in ms) between each toggling of LED
* This parameter can be user defined values. Pre-defined values used in that example are :
* @arg LED_BLINK_FAST : Fast Blinking
* @arg LED_BLINK_SLOW : Slow Blinking
* @arg LED_BLINK_ERROR : Error specific Blinking
* @retval None
*/
void LED_Blinking(uint32_t Period)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
/* Toggle IO in an infinite loop */
while (1)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(Period);
}
}
/**
* @brief Configures User push-button in GPIO or EXTI Line Mode.
* @param None
* @retval None
*/
void UserButton_Init(void)
{
/* Enable the BUTTON Clock */
USER_BUTTON_GPIO_CLK_ENABLE();
/* Configure GPIO for BUTTON */
LL_GPIO_SetPinMode(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_MODE_INPUT);
/* Connect External Line to the GPIO*/
USER_BUTTON_SYSCFG_SET_EXTI();
/* Enable a rising trigger External line 13 Interrupt */
USER_BUTTON_EXTI_LINE_ENABLE();
USER_BUTTON_EXTI_FALLING_TRIG_ENABLE();
/* Configure NVIC for USER_BUTTON_EXTI_IRQn */
NVIC_EnableIRQ(USER_BUTTON_EXTI_IRQn);
NVIC_SetPriority(USER_BUTTON_EXTI_IRQn,0x03);
}
/**
* @brief System Clock Configuration
* The system Clock is configured as follow :
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 72000000
* HCLK(Hz) = 72000000
* AHB Prescaler = 1
* APB1 Prescaler = 2
* APB2 Prescaler = 1
* HSE Frequency(Hz) = 8000000
* PLLMUL = 9
* Flash Latency(WS) = 2
* @param None
* @retval None
*/
void SystemClock_Config(void)
{
/* Set FLASH latency */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
/* Enable HSE oscillator */
LL_RCC_HSE_EnableBypass();
LL_RCC_HSE_Enable();
while(LL_RCC_HSE_IsReady() != 1)
{
};
/* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
LL_RCC_PLL_Enable();
while(LL_RCC_PLL_IsReady() != 1)
{
};
/* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
};
/* Set APB1 & APB2 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
/* Set systick to 1ms in using frequency set to 72MHz */
LL_Init1msTick(72000000);
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(72000000);
}/******************************************************************************/
/* IRQ HANDLER TREATMENT Functions */
/******************************************************************************/
/**
* @brief Wait for User push-button press to start transfer.
* @param None
* @retval None
*/
/* */
void WaitForUserButtonPress(void)
{
while (ubButtonPress == 0)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(LED_BLINK_FAST);
}
/* Turn LED2 off */
LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Function to manage User push-button
* @param None
* @retval None
*/
void UserButton_Callback(void)
{
/* Update User push-button variable : to be checked in waiting loop in main program */
ubButtonPress = 1;
}
#ifdef SLAVE_BOARD
/**
* @brief This Function handle Slave events to perform a transmission process
* @note This function is composed in one step :
* -1- Prepare acknowledge for Slave address reception.
* @param None
* @retval None
*/
void Handle_I2C_Slave(void)
{
/* (1) Prepare acknowledge for Slave address reception **********************/
LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_ACK);
}
/**
* @brief Function called from I2C IRQ Handler when TXE flag is set
* Function is in charge of transmit a byte on I2C lines.
* @param None
* @retval None
*/
void Slave_Ready_To_Transmit_Callback(void)
{
/* Update ubNbDataToTransmit variable */
ubNbDataToTransmit--;
if(ubNbDataToTransmit == 0)
{
/* Disable Buffer Interrupts */
LL_I2C_DisableIT_BUF(I2C1);
}
/* Send the Byte requested by the Master */
LL_I2C_TransmitData8(I2C1, SLAVE_BYTE_TO_SEND);
}
/**
* @brief Function called from I2C IRQ Handler when STOP flag is set
* LED2 is On if data are correct.
* @param None
* @retval None
*/
void Slave_Complete_Callback(void)
{
/* Turn LED2 On:
* - Expected bytes have been sent
* - Slave Tx sequence completed successfully
*/
LED_On();
}
#else /* MASTER_BOARD */
/**
* @brief This Function handle Master events to perform a reception process
* @note This function is composed in different steps :
* -1- Prepare acknowledge for Master data reception.
* -2- Initiate a Start condition to the Slave device.
* @param None
* @retval None
*/
void Handle_I2C_Master(void)
{
/* (1) Prepare acknowledge for Master data reception ************************/
LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_ACK);
/* (2) Initiate a Start condition to the Slave device ***********************/
/* Master Generate Start condition */
LL_I2C_GenerateStartCondition(I2C1);
}
/**
* @brief Function called from I2C IRQ Handler when RXNE flag is set
* Function is in charge of reading byte received on I2C lines.
* @param None
* @retval None
*/
void Master_Reception_Callback(void)
{
if(ubNbDataToReceive > 3)
{
/* Read character in Receive Data register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
/* Update ubNbDataToReceive variable */
ubNbDataToReceive--;
}
else if((ubNbDataToReceive == 2) || (ubNbDataToReceive == 3))
{
/* Disable Buffer Interrupts */
LL_I2C_DisableIT_BUF(I2C1);
}
else if(ubNbDataToReceive == 1)
{
/* Disable Buffer Interrupts */
LL_I2C_DisableIT_BUF(I2C1);
/* Generate Stop condition */
LL_I2C_GenerateStopCondition(I2C1);
/* Read character in Receive Data register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
/* Update ubNbDataToReceive variable */
ubNbDataToReceive--;
/* Call function Master Complete Callback */
Master_Complete_Callback();
}
}
/**
* @brief Function called from I2C IRQ Handler when STOP flag is set
* Function is in charge of checking data received,
* LED2 is On if data are correct.
* @param None
* @retval None
*/
void Master_Complete_Callback(void)
{
if(ubNbDataToReceive == 3)
{
/* Prepare the generation of a Non ACKnowledge condition after next received bytes */
LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_NACK);
/* Read character in Receive Data register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
ubNbDataToReceive--;
/* Disable Buffer Interrupts */
LL_I2C_DisableIT_BUF(I2C1);
}
else if(ubNbDataToReceive == 2)
{
/* Generate Stop condition */
LL_I2C_GenerateStopCondition(I2C1);
/* Read character from Receive Data register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
ubNbDataToReceive--;
/* Read character from shift register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
ubNbDataToReceive--;
}
else
{
if(ubNbDataToReceive > 0)
{
/* Read character from shift register.
RXNE flag is cleared by reading data in RXDR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
/* Update ubNbDataToReceive variable */
ubNbDataToReceive--;
}
}
if(ubNbDataToReceive == 0)
{
/* (1) Disable I2C1 transfer event/error interrupts:
* - Disable Events Interrupt
* - Disable Error interrupts
*/
LL_I2C_DisableIT_EVT(I2C1);
LL_I2C_DisableIT_ERR(I2C1);
/* Read Received character.
RXNE flag is cleared by reading of RXDR register */
if(aReceiveBuffer[ubReceiveIndex-1] == SLAVE_BYTE_TO_SEND)
{
/* Turn LED2 On:
* - Expected byte has been received
* - Master Rx sequence completed successfully
*/
LED_On();
}
else
{
/* Call Error function */
Error_Callback();
}
}
}
#endif /* SLAVE_BOARD */
/**
* @brief Function called in case of error detected in I2C IT Handler
* @param None
* @retval None
*/
void Error_Callback(void)
{
#ifdef SLAVE_BOARD
/* Disable I2C1_EV_IRQn */
NVIC_DisableIRQ(I2C1_EV_IRQn);
#else
/* Disable I2C1_EV_IRQn */
NVIC_DisableIRQ(I2C1_EV_IRQn);
#endif /* SLAVE_BOARD */
/* Disable I2C1_ER_IRQn */
#ifdef SLAVE_BOARD
NVIC_DisableIRQ(I2C1_ER_IRQn);
#else
/* Disable I2C1_ER_IRQn */
NVIC_DisableIRQ(I2C1_ER_IRQn);
#endif /* SLAVE_BOARD */
/* Unexpected event : Set LED2 to Blinking mode to indicate error occurs */
LED_Blinking(LED_BLINK_ERROR);
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterRx_SlaveTx_IT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterRx_SlaveTx_IT\Src\stm32f1xx_it.c | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_TwoBoards_MasterRx_SlaveTx_IT/Src/stm32f1xx_it.c
* @author MCD Application Team
* @brief Main Interrupt Service Routines.
* This file provides template for all exceptions handler and
* peripherals interrupt service routine.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_it.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup I2C_TwoBoards_MasterRx_SlaveTx_IT
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
extern __IO uint8_t ubNbDataToTransmit;
extern __IO uint8_t ubNbDataToReceive;
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
/**
* @brief This function handles PendSVC exception.
* @param None
* @retval None
*/
void PendSV_Handler(void)
{
}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
void SysTick_Handler(void)
{
}
/******************************************************************************/
/* STM32F1xx Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @brief This function handles external lines 10 to 15 interrupt request.
* @param None
* @retval None
*/
void USER_BUTTON_IRQHANDLER(void)
{
/* Manage Flags */
if(LL_EXTI_IsActiveFlag_0_31(USER_BUTTON_EXTI_LINE) != RESET)
{
LL_EXTI_ClearFlag_0_31(USER_BUTTON_EXTI_LINE);
/* Manage code in main.c.*/
UserButton_Callback();
}
}
#ifdef SLAVE_BOARD
/**
* Brief This function handles I2C1 (Slave) event interrupt request.
* Param None
* Retval None
*/
void I2C1_EV_IRQHandler(void)
{
/* Check ADDR flag value in ISR register */
if(LL_I2C_IsActiveFlag_ADDR(I2C1))
{
/* Verify the slave transfer direction, a write direction, Slave enters transmitter mode */
if(LL_I2C_GetTransferDirection(I2C1) == LL_I2C_DIRECTION_WRITE)
{
/* Enable Buffer Interrupts */
LL_I2C_EnableIT_BUF(I2C1);
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C1);
}
else
{
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C1);
/* Call Error function */
Error_Callback();
}
}
/* Check TXE flag value in ISR register */
else if(LL_I2C_IsActiveFlag_TXE(I2C1))
{
/* Call function Slave Ready to Transmit Callback */
Slave_Ready_To_Transmit_Callback();
}
/* Check BTF flag value in ISR register */
else if(LL_I2C_IsActiveFlag_BTF(I2C1))
{
/* Send the next byte */
/* Call function Slave Ready to Transmit Callback */
Slave_Ready_To_Transmit_Callback();
}
}
/**
* Brief This function handles I2C1 (Slave) error interrupt request.
* Param None
* Retval None
*/
void I2C1_ER_IRQHandler(void)
{
/* Normal use case, if all bytes are sent and Acknowledge failure appears */
/* This correspond to the end of communication */
if((ubNbDataToTransmit == 0) && (LL_I2C_IsActiveFlag_AF(I2C1)))
{
/* Clear AF flag value in ISR register */
LL_I2C_ClearFlag_AF(I2C1);
/* Call function Slave Complete Callback */
Slave_Complete_Callback();
}
else
{
/* Call Error function */
Error_Callback();
}
}
#else /* MASTER_BOARD */
/**
* Brief This function handles I2C1 (Master) interrupt request.
* Param None
* Retval None
*/
void I2C1_EV_IRQHandler(void)
{
/* Check SB flag value in ISR register */
if(LL_I2C_IsActiveFlag_SB(I2C1))
{
/* Send Slave address with a 7-Bit SLAVE_OWN_ADDRESS for a read request */
LL_I2C_TransmitData8(I2C1, SLAVE_OWN_ADDRESS | I2C_REQUEST_READ);
}
/* Check ADDR flag value in ISR register */
else if(LL_I2C_IsActiveFlag_ADDR(I2C1))
{
if(ubNbDataToReceive == 1)
{
/* Prepare the generation of a Non ACKnowledge condition after next received byte */
LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_NACK);
/* Enable Buffer Interrupts */
LL_I2C_EnableIT_BUF(I2C1);
}
else if(ubNbDataToReceive == 2)
{
/* Prepare the generation of a Non ACKnowledge condition after next received byte */
LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_NACK);
/* Enable Pos */
LL_I2C_EnableBitPOS(I2C1);
}
else
{
/* Enable Buffer Interrupts */
LL_I2C_EnableIT_BUF(I2C1);
}
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C1);
}
/* Check BTF flag value in ISR register */
else if(LL_I2C_IsActiveFlag_BTF(I2C1))
{
/* Call function Master Complete Callback */
Master_Complete_Callback();
}
/* Check RXNE flag value in ISR register */
else if(LL_I2C_IsActiveFlag_RXNE(I2C1))
{
/* Call function Master Reception Callback */
Master_Reception_Callback();
}
}
/**
* Brief This function handles I2C1 (Master) error interrupt request.
* Param None
* Retval None
*/
void I2C1_ER_IRQHandler(void)
{
/* Call Error function */
Error_Callback();
}
#endif /* SLAVE_BOARD */
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterRx_SlaveTx_IT | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterRx_SlaveTx_IT\Src\system_stm32f1xx.c | /**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC->CFGR &= 0xF8FF0000U;
#else
RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull = ( pllmull >> 18U) + 2U;
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
#endif
}
#else
pllmull = pllmull >> 18U;
if (pllmull != 0x0DU)
{
pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
pllmull = 13U / 2U;
}
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
else
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
#endif /* STM32F105xC */
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
(void)(tmpreg);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD->CRL = 0x44BB44BBU;
GPIOD->CRH = 0xBBBBBBBBU;
GPIOE->CRL = 0xB44444BBU;
GPIOE->CRH = 0xBBBBBBBBU;
GPIOF->CRL = 0x44BBBBBBU;
GPIOF->CRH = 0xBBBB4444U;
GPIOG->CRL = 0x44BBBBBBU;
GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1->BTCR[4U] = 0x00001091U;
FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterTx_SlaveRx | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterTx_SlaveRx\Inc\main.h | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx/Inc/main.h
* @author MCD Application Team
* @brief Header for main.c module
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_ll_bus.h"
#include "stm32f1xx_ll_rcc.h"
#include "stm32f1xx_ll_system.h"
#include "stm32f1xx_ll_utils.h"
#include "stm32f1xx_ll_cortex.h"
#include "stm32f1xx_ll_gpio.h"
#include "stm32f1xx_ll_exti.h"
#include "stm32f1xx_ll_i2c.h"
#include "stm32f1xx_ll_pwr.h"
#if defined(USE_FULL_ASSERT)
#include "stm32_assert.h"
#endif /* USE_FULL_ASSERT */
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Define used to enable time-out management*/
#define USE_TIMEOUT 0
/**
* @brief LED2
*/
#define LED2_PIN LL_GPIO_PIN_5
#define LED2_GPIO_PORT GPIOA
#define LED2_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOA)
/**
* @brief Toggle periods for various blinking modes
*/
#define LED_BLINK_FAST 200
#define LED_BLINK_SLOW 500
#define LED_BLINK_ERROR 1000
/**
* @brief Key push-button
*/
#define USER_BUTTON_PIN LL_GPIO_PIN_13
#define USER_BUTTON_GPIO_PORT GPIOC
#define USER_BUTTON_GPIO_CLK_ENABLE() LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOC)
#define USER_BUTTON_EXTI_LINE LL_EXTI_LINE_13
#define USER_BUTTON_EXTI_IRQn EXTI15_10_IRQn
#define USER_BUTTON_EXTI_LINE_ENABLE() LL_EXTI_EnableIT_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_EXTI_FALLING_TRIG_ENABLE() LL_EXTI_EnableFallingTrig_0_31(USER_BUTTON_EXTI_LINE)
#define USER_BUTTON_SYSCFG_SET_EXTI() do { \
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_AFIO); \
LL_GPIO_AF_SetEXTISource(LL_GPIO_AF_EXTI_PORTC, LL_GPIO_AF_EXTI_LINE13); \
} while(0)
#define USER_BUTTON_IRQHANDLER EXTI15_10_IRQHandler
/**
* @brief Slave settings
*/
#define SLAVE_OWN_ADDRESS 0x5A /* This value is a left shift of a real 7 bits of a slave address
value which can find in a Datasheet as example: b0101101
mean in uint8_t equivalent at 0x2D and this value can be
seen in the OAR1 register in bits ADD[1:7] */
/**
* @brief Master Transfer Request Direction
*/
#define I2C_REQUEST_WRITE 0x00
#define I2C_REQUEST_READ 0x01
/* Uncomment this line to use the board as slave, if not it is used as master */
//#define SLAVE_BOARD
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
/* IRQ Handler treatment functions */
void UserButton_Callback(void);
void Error_Callback(void);
#endif /* __MAIN_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterTx_SlaveRx | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterTx_SlaveRx\Inc\stm32f1xx_it.h | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx/Inc/stm32f1xx_it.h
* @author MCD Application Team
* @brief This file contains the headers of the interrupt handlers.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32F1xx_IT_H
#define __STM32F1xx_IT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
/* Exported functions ------------------------------------------------------- */
void NMI_Handler(void);
void HardFault_Handler(void);
void MemManage_Handler(void);
void BusFault_Handler(void);
void UsageFault_Handler(void);
void SVC_Handler(void);
void DebugMon_Handler(void);
void PendSV_Handler(void);
void SysTick_Handler(void);
void USER_BUTTON_IRQHANDLER(void);
#ifdef __cplusplus
}
#endif
#endif /* __STM32F1xx_IT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterTx_SlaveRx | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterTx_SlaveRx\Inc\stm32_assert.h | /**
******************************************************************************
* @file stm32_assert.h
* @author MCD Application Team
* @brief STM32 assert template file.
* This file should be copied to the application folder and renamed
* to stm32_assert.h.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H
#ifdef __cplusplus
extern "C" {
#endif
/* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(uint8_t* file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32_ASSERT_H */
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterTx_SlaveRx | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterTx_SlaveRx\Src\main.c | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx/Src/main.c
* @author MCD Application Team
* @brief This example describes how to send/receive bytes over I2C IP using
* the STM32F1xx I2C LL API.
* Peripheral initialization done using LL unitary services functions.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup I2C_TwoBoards_MasterTx_SlaveRx
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/**
* @brief Timeout value
*/
#if (USE_TIMEOUT == 1)
#ifdef SLAVE_BOARD
#define I2C_SEND_TIMEOUT_RXNE_BTF_MS 5
#else /* MASTER_BOARD */
#define I2C_SEND_TIMEOUT_TXE_MS 5
#define I2C_SEND_TIMEOUT_SB_MS 5
#define I2C_SEND_TIMEOUT_ADDR_MS 5
#endif /* SLAVE_BOARD */
#endif /* USE_TIMEOUT */
/**
* @brief I2C devices settings
*/
/* I2C SPEEDCLOCK define to max value: Fast Mode @400kHz */
#define I2C_SPEEDCLOCK 400000
#define I2C_DUTYCYCLE LL_I2C_DUTYCYCLE_2
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
#if (USE_TIMEOUT == 1)
uint32_t Timeout = 0; /* Variable used for Timeout management */
#endif /* USE_TIMEOUT */
const uint8_t aLedOn[] = "LED ON";
#ifdef SLAVE_BOARD
/**
* @brief Variables related to SlaveReceive process
*/
uint8_t aReceiveBuffer[0xF] = {0};
__IO uint8_t ubReceiveIndex = 0;
#else /* MASTER_BOARD */
/**
* @brief Variables related to MasterTransmit process
*/
__IO uint8_t ubNbDataToTransmit = sizeof(aLedOn);
uint8_t* pTransmitBuffer = (uint8_t*)aLedOn;
#endif /* SLAVE_BOARD */
/**
* @brief Variables related to MasterReceive and SlaveTransmit process
*/
__IO uint8_t ubButtonPress = 0;
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void LED_Init(void);
void LED_On(void);
void LED_Off(void);
void LED_Blinking(uint32_t Period);
void UserButton_Init(void);
void WaitForUserButtonPress(void);
#ifdef SLAVE_BOARD
void Configure_I2C_Slave(void);
void Activate_I2C_Slave(void);
void Handle_I2C_Slave(void);
uint8_t Buffercmp8(uint8_t* pBuffer1, uint8_t* pBuffer2, uint8_t BufferLength);
#else /* MASTER_BOARD */
void Configure_I2C_Master(void);
void Activate_I2C_Master(void);
void Handle_I2C_Master(void);
#endif /* SLAVE_BOARD */
/* Private functions ---------------------------------------------------------*/
/**
* @brief Main program
* @param None
* @retval None
*/
int main(void)
{
/* Configure the system clock to 72 MHz */
SystemClock_Config();
/* Initialize LED2 */
LED_Init();
/* Set LED2 Off */
LED_Off();
/* Initialize User push-button in EXTI mode */
UserButton_Init();
#ifdef SLAVE_BOARD
/* Configure I2C1 (I2C IP configuration in Slave mode and related GPIO initialization) */
Configure_I2C_Slave();
/* Wait for User push-button press to start transfer */
WaitForUserButtonPress();
/* Enable the I2C1 peripheral (Slave) */
Activate_I2C_Slave();
/* Handle I2C1 events (Slave) */
Handle_I2C_Slave();
#else /* MASTER_BOARD */
/* Configure I2C1 (I2C IP configuration in Master mode and related GPIO initialization) */
Configure_I2C_Master();
/* Wait for User push-button press to start transfer */
WaitForUserButtonPress();
/* Enable the I2C1 peripheral (Master) */
Activate_I2C_Master();
/* Handle I2C1 events (Master) */
Handle_I2C_Master();
#endif /* SLAVE_BOARD */
/* Infinite loop */
while (1)
{
}
}
#ifdef SLAVE_BOARD
/**
* @brief This function configures I2C1 in Slave mode.
* @note This function is used to :
* -1- Enables GPIO clock.
* -2- Enable the I2C1 peripheral clock and configures the I2C1 pins.
* -3- Configure I2C1 functional parameters.
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_I2C_Slave(void)
{
/* (1) Enables GPIO clock */
/* Enable the peripheral clock of GPIOB */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
/* (2) Enable the I2C1 peripheral clock *************************************/
/* Enable the peripheral clock for I2C1 */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1);
/* Configure SCL Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_6, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_6, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_6, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_6, LL_GPIO_PULL_UP);
/* Configure SDA Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_7, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_7, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_7, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_7, LL_GPIO_PULL_UP);
/* (3) Configure I2C1 functional parameters ***********************/
/* Disable I2C1 prior modifying configuration registers */
LL_I2C_Disable(I2C1);
/* Configure the Own Address1 :
* - OwnAddress1 is SLAVE_OWN_ADDRESS
* - OwnAddrSize is LL_I2C_OWNADDRESS1_7BIT
*/
LL_I2C_SetOwnAddress1(I2C1, SLAVE_OWN_ADDRESS, LL_I2C_OWNADDRESS1_7BIT);
/* Enable Clock stretching */
/* Reset Value is Clock stretching enabled */
//LL_I2C_EnableClockStretching(I2C1);
/* Enable General Call */
/* Reset Value is General Call disabled */
//LL_I2C_EnableGeneralCall(I2C1);
/* Configure the 7bits Own Address2 */
/* Reset Values of :
* - OwnAddress2 is 0x00
* - Own Address2 is disabled
*/
//LL_I2C_SetOwnAddress2(I2C1, 0x00);
//LL_I2C_DisableOwnAddress2(I2C1);
/* Enable Peripheral in I2C mode */
/* Reset Value is I2C mode */
//LL_I2C_SetMode(I2C1, LL_I2C_MODE_I2C);
}
/**
* @brief This function Activate I2C1 peripheral (Slave)
* @note This function is used to :
* -1- Enable I2C1.
* @param None
* @retval None
*/
void Activate_I2C_Slave(void)
{
/* (1) Enable I2C1 **********************************************************/
LL_I2C_Enable(I2C1);
}
#else /* MASTER_BOARD */
/**
* @brief This function configures I2C1 in Master mode.
* @note This function is used to :
* -1- Enables GPIO clock.
* -2- Enable the I2C1 peripheral clock and configures the I2C1 pins.
* -3- Configure I2C1 functional parameters.
* @note Peripheral configuration is minimal configuration from reset values.
* Thus, some useless LL unitary functions calls below are provided as
* commented examples - setting is default configuration from reset.
* @param None
* @retval None
*/
void Configure_I2C_Master(void)
{
LL_RCC_ClocksTypeDef rcc_clocks;
/* (1) Enables GPIO clock **********************/
/* Enable the peripheral clock of GPIOB */
LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_GPIOB);
/* (2) Enable the I2C1 peripheral clock *************************************/
/* Enable the peripheral clock for I2C1 */
LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_I2C1);
/* Configure SCL Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_6, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_6, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_6, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_6, LL_GPIO_PULL_UP);
/* Configure SDA Pin as : Alternate function, High Speed, Open drain, Pull up */
LL_GPIO_SetPinMode(GPIOB, LL_GPIO_PIN_7, LL_GPIO_MODE_ALTERNATE);
LL_GPIO_SetPinSpeed(GPIOB, LL_GPIO_PIN_7, LL_GPIO_SPEED_FREQ_HIGH);
LL_GPIO_SetPinOutputType(GPIOB, LL_GPIO_PIN_7, LL_GPIO_OUTPUT_OPENDRAIN);
LL_GPIO_SetPinPull(GPIOB, LL_GPIO_PIN_7, LL_GPIO_PULL_UP);
/* (3) Configure I2C1 functional parameters ********************************/
/* Disable I2C1 prior modifying configuration registers */
LL_I2C_Disable(I2C1);
/* Retrieve Clock frequencies */
LL_RCC_GetSystemClocksFreq(&rcc_clocks);
/* Configure the SCL Clock Speed */
LL_I2C_ConfigSpeed(I2C1, rcc_clocks.PCLK1_Frequency, I2C_SPEEDCLOCK, I2C_DUTYCYCLE);
/* Configure the Own Address1 */
/* Reset Values of :
* - OwnAddress1 is 0x00
* - OwnAddrSize is LL_I2C_OWNADDRESS1_7BIT
*/
//LL_I2C_SetOwnAddress1(I2C1, 0x00, LL_I2C_OWNADDRESS1_7BIT);
/* Enable Clock stretching */
/* Reset Value is Clock stretching enabled */
//LL_I2C_EnableClockStretching(I2C1);
/* Enable General Call */
/* Reset Value is General Call disabled */
//LL_I2C_EnableGeneralCall(I2C1);
/* Configure the 7bits Own Address2 */
/* Reset Values of :
* - OwnAddress2 is 0x00
* - Own Address2 is disabled
*/
//LL_I2C_SetOwnAddress2(I2C1, 0x00);
//LL_I2C_DisableOwnAddress2(I2C1);
/* Enable Peripheral in I2C mode */
/* Reset Value is I2C mode */
//LL_I2C_SetMode(I2C1, LL_I2C_MODE_I2C);
}
/**
* @brief This function Activate I2C1 peripheral (Master)
* @note This function is used to :
* -1- Enable I2C1.
* @param None
* @retval None
*/
void Activate_I2C_Master(void)
{
/* (1) Enable I2C1 **********************************************************/
LL_I2C_Enable(I2C1);
}
#endif /* SLAVE_BOARD */
/**
* @brief Initialize LED2.
* @param None
* @retval None
*/
void LED_Init(void)
{
/* Enable the LED2 Clock */
LED2_GPIO_CLK_ENABLE();
/* Configure IO in output push-pull mode to drive external LED2 */
LL_GPIO_SetPinMode(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_MODE_OUTPUT);
/* Reset value is LL_GPIO_OUTPUT_PUSHPULL */
//LL_GPIO_SetPinOutputType(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_OUTPUT_PUSHPULL);
/* Reset value is LL_GPIO_SPEED_FREQ_LOW */
//LL_GPIO_SetPinSpeed(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_SPEED_FREQ_LOW);
/* Reset value is LL_GPIO_PULL_NO */
//LL_GPIO_SetPinPull(LED2_GPIO_PORT, LED2_PIN, LL_GPIO_PULL_NO);
}
/**
* @brief Turn-on LED2.
* @param None
* @retval None
*/
void LED_On(void)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Turn-off LED2.
* @param None
* @retval None
*/
void LED_Off(void)
{
/* Turn LED2 off */
LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
/**
* @brief Set LED2 to Blinking mode for an infinite loop (toggle period based on value provided as input parameter).
* @param Period : Period of time (in ms) between each toggling of LED
* This parameter can be user defined values. Pre-defined values used in that example are :
* @arg LED_BLINK_FAST : Fast Blinking
* @arg LED_BLINK_SLOW : Slow Blinking
* @arg LED_BLINK_ERROR : Error specific Blinking
* @retval None
*/
void LED_Blinking(uint32_t Period)
{
/* Turn LED2 on */
LL_GPIO_SetOutputPin(LED2_GPIO_PORT, LED2_PIN);
/* Toggle IO in an infinite loop */
while (1)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(Period);
}
}
/**
* @brief Configures User push-button in GPIO or EXTI Line Mode.
* @param None
* @retval None
*/
void UserButton_Init(void)
{
/* Enable the BUTTON Clock */
USER_BUTTON_GPIO_CLK_ENABLE();
/* Configure GPIO for BUTTON */
LL_GPIO_SetPinMode(USER_BUTTON_GPIO_PORT, USER_BUTTON_PIN, LL_GPIO_MODE_INPUT);
/* Connect External Line to the GPIO*/
USER_BUTTON_SYSCFG_SET_EXTI();
/* Enable a rising trigger External line 13 Interrupt */
USER_BUTTON_EXTI_LINE_ENABLE();
USER_BUTTON_EXTI_FALLING_TRIG_ENABLE();
/* Configure NVIC for USER_BUTTON_EXTI_IRQn */
NVIC_EnableIRQ(USER_BUTTON_EXTI_IRQn);
NVIC_SetPriority(USER_BUTTON_EXTI_IRQn, 0x03);
}
/**
* @brief Wait for User push-button press to start transfer.
* @param None
* @retval None
*/
/* */
void WaitForUserButtonPress(void)
{
while (ubButtonPress == 0)
{
LL_GPIO_TogglePin(LED2_GPIO_PORT, LED2_PIN);
LL_mDelay(LED_BLINK_FAST);
}
/* Turn LED2 off */
LL_GPIO_ResetOutputPin(LED2_GPIO_PORT, LED2_PIN);
}
#ifdef SLAVE_BOARD
/**
* @brief This Function handle Slave events to perform a reception process
* @note This function is composed in different steps :
* -1- Prepare acknowledge for Slave address reception
* -2- Wait ADDR flag and check address match code and direction
* -3- Loop until end of transfer received (STOP flag raised)
* -3.1- Receive data (RXNE flag raised)
* -3.2- Receive data (BTF flag raised)
* -4- Clear pending flags, Check Data consistency
* @param None
* @retval None
*/
void Handle_I2C_Slave(void)
{
/* (1) Prepare acknowledge for Slave address reception **********************/
LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_ACK);
/* (2) Wait ADDR flag and check address match code and direction ************/
while(!LL_I2C_IsActiveFlag_ADDR(I2C1))
{
}
/* Verify the transfer direction, direction at Read (mean write direction for Master), Slave enters receiver mode */
if(LL_I2C_GetTransferDirection(I2C1) == LL_I2C_DIRECTION_READ)
{
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C1);
}
else
{
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C1);
/* Call Error function */
Error_Callback();
}
/* (3) Loop until end of transfer received (STOP flag raised) ***************/
#if (USE_TIMEOUT == 1)
Timeout = I2C_SEND_TIMEOUT_RXNE_BTF_MS;
#endif /* USE_TIMEOUT */
/* Loop until STOP flag is raised */
while(!LL_I2C_IsActiveFlag_STOP(I2C1))
{
/* (3.1) Receive data (RXNE flag raised) **********************************/
/* Check RXNE flag value in ISR register */
if(LL_I2C_IsActiveFlag_RXNE(I2C1))
{
/* Read character in Receive Data register.
RXNE flag is cleared by reading data in DR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
#if (USE_TIMEOUT == 1)
Timeout = I2C_SEND_TIMEOUT_RXNE_BTF_MS;
#endif /* USE_TIMEOUT */
}
/* (3.2) Receive data (BTF flag raised) ***********************************/
/* Check BTF flag value in ISR register */
if(LL_I2C_IsActiveFlag_BTF(I2C1))
{
/* Read character in Receive Data register.
BTF flag is cleared by reading data in DR register */
aReceiveBuffer[ubReceiveIndex++] = LL_I2C_ReceiveData8(I2C1);
#if (USE_TIMEOUT == 1)
Timeout = I2C_SEND_TIMEOUT_RXNE_BTF_MS;
#endif /* USE_TIMEOUT */
}
#if (USE_TIMEOUT == 1)
/* Check Systick counter flag to decrement the time-out value */
if (LL_SYSTICK_IsActiveCounterFlag())
{
if(Timeout-- == 0)
{
/* Time-out occurred. Set LED2 to blinking mode */
LED_Blinking(LED_BLINK_SLOW);
}
}
#endif /* USE_TIMEOUT */
}
/* (4) Clear pending flags, Check Data consistency **************************/
/* End of I2C_SlaveReceiver_MasterTransmitter_DMA Process */
LL_I2C_ClearFlag_STOP(I2C1);
/* Check if data request to turn on the LED2 */
if(Buffercmp8((uint8_t*)aReceiveBuffer, (uint8_t*)aLedOn, (ubReceiveIndex-1)) == 0)
{
/* Turn LED2 On:
* - Expected bytes have been received
* - Slave Rx sequence completed successfully
*/
LED_On();
}
else
{
/* Call Error function */
Error_Callback();
}
}
/**
* @brief Compares two 8-bit buffers and returns the comparison result.
* @param pBuffer1: pointer to the source buffer to be compared to.
* @param pBuffer2: pointer to the second source buffer to be compared to the first.
* @param BufferLength: buffer's length.
* - 0: Comparison is OK (the two Buffers are identical)
* - Value different from 0: Comparison is NOK (Buffers are different)
*/
uint8_t Buffercmp8(uint8_t* pBuffer1, uint8_t* pBuffer2, uint8_t BufferLength)
{
while (BufferLength--)
{
if (*pBuffer1 != *pBuffer2)
{
return 1;
}
pBuffer1++;
pBuffer2++;
}
return 0;
}
#else /* MASTER_BOARD */
/**
* @brief This Function handle Master events to perform a transmission process
* @note This function is composed in different steps :
* -1- Prepare acknowledge for Master data reception.
* -2- Initiate a Start condition to the Slave device.
* -3- Loop until Start Bit transmitted (SB flag raised).
* -4- Send Slave address with a 7-Bit SLAVE_OWN_ADDRESS for a write request.
* -5- Loop until Address Acknowledgement received (ADDR flag raised).
* -6- Clear ADDR flag and loop until end of transfer (ubNbDataToTransmit == 0).
* -6.1 Transmit data (TXE flag raised).
* -7- End of transfer, Data consistency are checking into Slave process.
* @param None
* @retval None
*/
void Handle_I2C_Master(void)
{
/* (1) Prepare acknowledge for Master data reception ************************/
LL_I2C_AcknowledgeNextData(I2C1, LL_I2C_ACK);
/* (2) Initiate a Start condition to the Slave device ***********************/
/* Master Generate Start condition */
LL_I2C_GenerateStartCondition(I2C1);
/* (3) Loop until Start Bit transmitted (SB flag raised) ********************/
#if (USE_TIMEOUT == 1)
Timeout = I2C_SEND_TIMEOUT_SB_MS;
#endif /* USE_TIMEOUT */
/* Loop until SB flag is raised */
while(!LL_I2C_IsActiveFlag_SB(I2C1))
{
#if (USE_TIMEOUT == 1)
/* Check Systick counter flag to decrement the time-out value */
if (LL_SYSTICK_IsActiveCounterFlag())
{
if(Timeout-- == 0)
{
/* Time-out occurred. Set LED2 to blinking mode */
LED_Blinking(LED_BLINK_SLOW);
}
}
#endif /* USE_TIMEOUT */
}
/* (4) Send Slave address with a 7-Bit SLAVE_OWN_ADDRESS for a write request */
LL_I2C_TransmitData8(I2C1, SLAVE_OWN_ADDRESS | I2C_REQUEST_WRITE);
/* (5) Loop until Address Acknowledgement received (ADDR flag raised) *******/
#if (USE_TIMEOUT == 1)
Timeout = I2C_SEND_TIMEOUT_ADDR_MS;
#endif /* USE_TIMEOUT */
/* Loop until ADDR flag is raised */
while(!LL_I2C_IsActiveFlag_ADDR(I2C1))
{
#if (USE_TIMEOUT == 1)
/* Check Systick counter flag to decrement the time-out value */
if (LL_SYSTICK_IsActiveCounterFlag())
{
if(Timeout-- == 0)
{
/* Time-out occurred. Set LED2 to blinking mode */
LED_Blinking(LED_BLINK_SLOW);
}
}
#endif /* USE_TIMEOUT */
}
/* (6) Clear ADDR flag and loop until end of transfer (ubNbDataToTransmit == 0) */
/* Clear ADDR flag value in ISR register */
LL_I2C_ClearFlag_ADDR(I2C1);
#if (USE_TIMEOUT == 1)
Timeout = I2C_SEND_TIMEOUT_TXE_MS;
#endif /* USE_TIMEOUT */
/* Loop until TXE flag is raised */
while(ubNbDataToTransmit > 0)
{
/* (6.1) Transmit data (TXE flag raised) **********************************/
/* Check TXE flag value in ISR register */
if(LL_I2C_IsActiveFlag_TXE(I2C1))
{
/* Write data in Transmit Data register.
TXE flag is cleared by writing data in TXDR register */
LL_I2C_TransmitData8(I2C1, (*pTransmitBuffer++));
ubNbDataToTransmit--;
#if (USE_TIMEOUT == 1)
Timeout = I2C_SEND_TIMEOUT_TXE_MS;
#endif /* USE_TIMEOUT */
}
#if (USE_TIMEOUT == 1)
/* Check Systick counter flag to decrement the time-out value */
if (LL_SYSTICK_IsActiveCounterFlag())
{
if(Timeout-- == 0)
{
/* Time-out occurred. Set LED2 to blinking mode */
LED_Blinking(LED_BLINK_SLOW);
}
}
#endif /* USE_TIMEOUT */
}
/* (7) End of transfer, Data consistency are checking into Slave process *****/
/* Generate Stop condition */
LL_I2C_GenerateStopCondition(I2C1);
/* Turn LED2 On:
* - Expected bytes have been sent
* - Master Tx sequence completed successfully
*/
LED_On();
}
#endif /* SLAVE_BOARD */
/**
* @brief System Clock Configuration
* The system Clock is configured as follow :
* System Clock source = PLL (HSE)
* SYSCLK(Hz) = 72000000
* HCLK(Hz) = 72000000
* AHB Prescaler = 1
* APB1 Prescaler = 2
* APB2 Prescaler = 1
* HSE Frequency(Hz) = 8000000
* PLLMUL = 9
* Flash Latency(WS) = 2
* @param None
* @retval None
*/
void SystemClock_Config(void)
{
/* Set FLASH latency */
LL_FLASH_SetLatency(LL_FLASH_LATENCY_2);
/* Enable HSE oscillator */
LL_RCC_HSE_EnableBypass();
LL_RCC_HSE_Enable();
while(LL_RCC_HSE_IsReady() != 1)
{
};
/* Main PLL configuration and activation */
LL_RCC_PLL_ConfigDomain_SYS(LL_RCC_PLLSOURCE_HSE_DIV_1, LL_RCC_PLL_MUL_9);
LL_RCC_PLL_Enable();
while(LL_RCC_PLL_IsReady() != 1)
{
};
/* Sysclk activation on the main PLL */
LL_RCC_SetAHBPrescaler(LL_RCC_SYSCLK_DIV_1);
LL_RCC_SetSysClkSource(LL_RCC_SYS_CLKSOURCE_PLL);
while(LL_RCC_GetSysClkSource() != LL_RCC_SYS_CLKSOURCE_STATUS_PLL)
{
};
/* Set APB1 & APB2 prescaler*/
LL_RCC_SetAPB1Prescaler(LL_RCC_APB1_DIV_2);
LL_RCC_SetAPB2Prescaler(LL_RCC_APB2_DIV_1);
/* Set systick to 1ms in using frequency set to 72MHz */
LL_Init1msTick(72000000);
/* Update CMSIS variable (which can be updated also through SystemCoreClockUpdate function) */
LL_SetSystemCoreClock(72000000);
}/******************************************************************************/
/* IRQ HANDLER TREATMENT Functions */
/******************************************************************************/
/**
* @brief Function to manage User push-button
* @param None
* @retval None
*/
void UserButton_Callback(void)
{
/* Update User push-button variable : to be checked in waiting loop in main program */
ubButtonPress = 1;
}
/**
* @brief Function called in case of error detected in I2C IT Handler
* @param None
* @retval None
*/
void Error_Callback(void)
{
/* Unexpected event : Set LED2 to Blinking mode to indicate error occurs */
LED_Blinking(LED_BLINK_ERROR);
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d", file, line) */
/* Infinite loop */
while (1)
{
}
}
#endif
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterTx_SlaveRx | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterTx_SlaveRx\Src\stm32f1xx_it.c | /**
******************************************************************************
* @file Examples_LL/I2C/I2C_TwoBoards_MasterTx_SlaveRx/Src/stm32f1xx_it.c
* @author MCD Application Team
* @brief Main Interrupt Service Routines.
* This file provides template for all exceptions handler and
* peripherals interrupt service routine.
******************************************************************************
* @attention
*
* Copyright (c) 2016 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes ------------------------------------------------------------------*/
#include "stm32f1xx_it.h"
/** @addtogroup STM32F1xx_LL_Examples
* @{
*/
/** @addtogroup I2C_TwoBoards_MasterTx_SlaveRx
* @{
*/
/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/
/******************************************************************************/
/* Cortex-M3 Processor Exceptions Handlers */
/******************************************************************************/
/**
* @brief This function handles NMI exception.
* @param None
* @retval None
*/
void NMI_Handler(void)
{
}
/**
* @brief This function handles Hard Fault exception.
* @param None
* @retval None
*/
void HardFault_Handler(void)
{
/* Go to infinite loop when Hard Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Memory Manage exception.
* @param None
* @retval None
*/
void MemManage_Handler(void)
{
/* Go to infinite loop when Memory Manage exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Bus Fault exception.
* @param None
* @retval None
*/
void BusFault_Handler(void)
{
/* Go to infinite loop when Bus Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles Usage Fault exception.
* @param None
* @retval None
*/
void UsageFault_Handler(void)
{
/* Go to infinite loop when Usage Fault exception occurs */
while (1)
{
}
}
/**
* @brief This function handles SVCall exception.
* @param None
* @retval None
*/
void SVC_Handler(void)
{
}
/**
* @brief This function handles Debug Monitor exception.
* @param None
* @retval None
*/
void DebugMon_Handler(void)
{
}
/**
* @brief This function handles PendSVC exception.
* @param None
* @retval None
*/
void PendSV_Handler(void)
{
}
/**
* @brief This function handles SysTick Handler.
* @param None
* @retval None
*/
void SysTick_Handler(void)
{
}
/******************************************************************************/
/* STM32F1xx Peripherals Interrupt Handlers */
/* Add here the Interrupt Handler for the used peripheral(s) (PPP), for the */
/* available peripheral interrupt handler's name please refer to the startup */
/* file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @brief This function handles external lines 10 to 15 interrupt request.
* @param None
* @retval None
*/
void USER_BUTTON_IRQHANDLER(void)
{
/* Manage Flags */
if(LL_EXTI_IsActiveFlag_0_31(USER_BUTTON_EXTI_LINE) != RESET)
{
LL_EXTI_ClearFlag_0_31(USER_BUTTON_EXTI_LINE);
/* Manage code in main.c.*/
UserButton_Callback();
}
}
/**
* @}
*/
/**
* @}
*/
| 0 |
D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterTx_SlaveRx | D://workCode//uploadProject\STM32CubeF1\Projects\STM32F103RB-Nucleo\Examples_LL\I2C\I2C_TwoBoards_MasterTx_SlaveRx\Src\system_stm32f1xx.c | /**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/*!< Uncomment the following line if you need to relocate your vector Table in
Internal SRAM. */
/* #define VECT_TAB_SRAM */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 16000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
/* Reset the RCC clock configuration to the default reset state(for debug purpose) */
/* Set HSION bit */
RCC->CR |= 0x00000001U;
/* Reset SW, HPRE, PPRE1, PPRE2, ADCPRE and MCO bits */
#if !defined(STM32F105xC) && !defined(STM32F107xC)
RCC->CFGR &= 0xF8FF0000U;
#else
RCC->CFGR &= 0xF0FF0000U;
#endif /* STM32F105xC */
/* Reset HSEON, CSSON and PLLON bits */
RCC->CR &= 0xFEF6FFFFU;
/* Reset HSEBYP bit */
RCC->CR &= 0xFFFBFFFFU;
/* Reset PLLSRC, PLLXTPRE, PLLMUL and USBPRE/OTGFSPRE bits */
RCC->CFGR &= 0xFF80FFFFU;
#if defined(STM32F105xC) || defined(STM32F107xC)
/* Reset PLL2ON and PLL3ON bits */
RCC->CR &= 0xEBFFFFFFU;
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x00FF0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#elif defined(STM32F100xB) || defined(STM32F100xE)
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
/* Reset CFGR2 register */
RCC->CFGR2 = 0x00000000U;
#else
/* Disable all interrupts and clear pending bits */
RCC->CIR = 0x009F0000U;
#endif /* STM32F105xC */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
#ifdef VECT_TAB_SRAM
SCB->VTOR = SRAM_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#else
SCB->VTOR = FLASH_BASE | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal FLASH. */
#endif
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull = ( pllmull >> 18U) + 2U;
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
#endif
}
#else
pllmull = pllmull >> 18U;
if (pllmull != 0x0DU)
{
pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
pllmull = 13U / 2U;
}
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
else
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
#endif /* STM32F105xC */
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
(void)(tmpreg);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD->CRL = 0x44BB44BBU;
GPIOD->CRH = 0xBBBBBBBBU;
GPIOE->CRL = 0xB44444BBU;
GPIOE->CRH = 0xBBBBBBBBU;
GPIOF->CRL = 0x44BBBBBBU;
GPIOF->CRH = 0xBBBB4444U;
GPIOG->CRL = 0x44BBBBBBU;
GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1->BTCR[4U] = 0x00001091U;
FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
| 0 |